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networkZONE Products for the week of February 25, 2008
Phyworks Says…
CMOS Retimer With EDC Brings 10G Ethernet Performance To Legacy Fibre Infrastructure
Phyworks has announced a fully 10GBASE-LRM compliant serial retiming receiver with Electronic Dispersion Compensation (EDC). Manufactured on a CMOS process, this second-generation EDC chip offers a more powerful equalizer, is smaller in size than alternatives and is easier to integrate with other devices. The PHY2060 enables simple upgrade of X2 and XFP optical modules and SFP+ based line cards to true 10Gbits/s LRM operation.
Combining clock data recovery (CDR) and a fully automatic EDC circuit, the highly integrated PHY2060 greatly simplifies optical module design. The chip’s internal algorithms remove the need for complex microcontroller support and thereby substantially reduce product development time.
A shorter bill of materials, combined with the IC’s miniature 36-pin, 5mm x 5mm flip-chip BGA packaging, means greater design flexibility for developers of ultra small form factor optical modules. Port densities can be substantially increased, while total module cost can be significantly reduced.
To simplify product evaluation and qualification the PHY2060 also includes a PRBS generator and a BER detector, enabling comprehensive end-to-end link testing. On boot-up the device automatically selects between the chip’s 2-wire or serial peripheral interfaces.
Phyworks’ proprietary, fully LRM compliant EDC technology is regarded as the industry’s most cost effective solution for overcoming modal dispersion in multimode fibre LAN infrastructure and achieving reliable 300m link lengths.
EN-Genius Says…
With data centers being pushed hard to upgrade their capacity, a product like Phyworks PHY2060 10GBASE-LRM serial retiming receiver that cuts the cost and power of 10G links is a welcome development. The PHY2060 low power, and integrated EDC make it a great fit for use in 10G LRM modules that are displacing the more costly LX4 products.
There are several receivers on the market (such as Vitesse VSC8238) that perform a similar function, but Phyworks’ equalization scheme uses a hybrid analog/digital approach that uses much less power and shortens adaptation time dramatically. The analog circuitry of the feed-forward/decision-feedback equalizer is tuned by digital logic that controls the phase adjust and edge selection in the CDR. The same logic core sets the slicing point for the quantizer, and implements adaptation algorithms for the EDC, eliminating the external microcontrollers required by the Vitesse part. Using dedicated logic instead of a processor is one of the big reasons that the PHY2060 is able to adapt its EQ and EDC much faster than other devices. It also helps explain the device’s relatively low 900 mW typical power consumption, a figure that’s far lower than the 1.3 W - 1.5 W reported for some competing products.
The other clever bit about the PHY2060 is that it performs clock recovery before the signal is run through the EDC circuit. While it seems a bit counter-intuitive to want to extract a clock from a fuzzy, noisy signal, the timing information you get makes it much easier for the equalizer to locate the center point of the data bits it’s supposed to be recovering. This eliminates the need for the more complex (and power-hungry) continuous time filters used by competitors. Phyworks does not usually like to share any details of its CDR because they feel it’s one of their strongest competitive advantages but the information they shared with me in confidence made me comfortable that it is practical and should work as-advertised.
Taking this mixed-signal approach took some heavy investment in hard-to-find high-speed analog design expertise but it’s paid off nicely with much smaller die size and a lot less power consumption than DSP-based approaches that try to beat the problem to death with a digital sledgehammer. The extra performance it provides to the CDR and EQ also make it very attractive for SFP+ modules that support 10 Gbit/s across up to 30 m of copper cabling. Although Phyworks has targeted the PHY2060 primarily for LRM applications, I expect that today’s immediate need for short-haul copper interconnects in data centers will account for a surprisingly large percentage of their short-term business.
PHY2060 samples and an evaluation board are available now through Phyworks’ regular distribution channels. The chip will be priced at $25 in volume.
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