networkZONE Products for the week of February 26, 2007
Raza Microelectronics Says…
XLS Processor Family Leverages Design Expertise and Success in Embedded Communication, Networking and Security Markets
Entry level to Mid-Range Processor Family Gives RMI Comprehensive Multi-Core, Multi-Thread Offering Building on Success of XLR Processor Family
Raza Microelectronics, Inc. (RMI), has announced the XLS Processor Family, a mid range to entry level, price optimized family positioned below the XLR processor family. The XLS is a general purpose processor, with a high level of programmability, scalability, intelligent packet management and the ability to combine control plane, data plane and security operations into a System-on-a-Chip (SoC) Processor.
Leveraging key technology from RMI's flagship XLR processor, including its MIPS-based multi-core, multi-thread architecture, the XLS Processor provides the speed, scalability and innovation necessary for mid-range to entry-level applications while maintaining software compatibility throughout both product families. The XLS product family addresses applications where PCB real estate and power are a premium, as well as those requiring integrated network connectivity, security and compression acceleration options. The XLS product family consists of the 600 Series, 400 Series, 200 Series, and features unprecedented power and performance for embedded communication, telecom, enterprise wireless and wired-line LAN, and SMB networking.
The XLS Processor family accelerates packet oriented applications essential for security appliances, wireless access points and switches, ATCA and AMC service cards, secured wire-line routers and switches, and telecom media gateways, radio controllers and network signaling products.
"The XLS Processor exemplifies our technology leadership and exhibits the innovation and capability of our design team here at RMI. We believe that it is the right product with the right features for our most demanding customers," said Lance Smith, vice president and general manager, Scalable Processor Solutions at RMI. "This entry level to mid- range offering gives our customers a feature rich, high performance yet cost optimized solution enabling them to further penetrate across diverse products and geographies which will in turn result in continued growth."
EN-Genius Says . . .
Raza Micro's XLS family of multi-core, multi-thread processors follows in the pinprints of their earlier XLR series (introduced last year and currently in production) and carries on its tradition of delivering unreasonably generous amounts of control, data and security processing to cost- and power-sensitive designs. By building a high-powered processor which can be programmed pretty much like a vanilla-flavored MIPS machine, it's no wonder that they're giving incumbents like Broadcom's SiByte series some serious competition.
 Like their higher-priced, higher-powered cousins that pack up to eight multi-threaded MIPS RISC cores, the single- and dual-core XLS machines use a combination of hardware accelerator cores and a clever ring-like interconnect bus to make the most of every clock cycle (see Fig. 1). Its point-to-point meshed connections run at full processor speed, and can support up to 10 simultaneous operations. The XLS innards are further streamlined using a packet distribution engine that controls all packet movement between CPUs, I/O and any of the accelerator cores. Incoming packets are pushed directly to memory (either L2, main memory, or both) under the control of a distribution engine which reads the header and generates a descriptor message for one or more CPUs. The descriptor contains the packet's location and what needs to be done to it so that the CPUs only need to examine the bytes which need to be worked on, while most of the data remains in memory and off the data bus.
The XLS security accelerator core also takes advantage of this message-based control scheme which requires no CPU intervention other than a fast message exchanged with the core to kick off an encrypt/decrypt sequence. As with operations involving the MIPS cores themselves, the actual packets reside in memory and are not passed to the security engine. The only thing the security core sees are messages with the part of the packet which requires attention.
Raza's innovative internal architecture and an application-appropriate mix of peripheral interconnects are some of the most compelling reasons that I'd expect this entry-level series to become one of the dominant players where a combination of control plane and data plane processing is required. The wide range of processing power provided by its XLS200/400/600 series will also help make these entry-level processors a gateway-drug that paves the way for using the higher-powered XLR series in enterprise- and carrier-class applications.
The XLS processor family will sample in June 2007, with full production scheduled for Q3 2007 with volume pricing ranging from $30 for the XLS200 to $150 for the XLS600.
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