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networkZONE Products for the week of April 28, 2008
Aquantia Says…
Industry’s First Low-Power 10GBASE-T Silicon for Mainstream Applications
AQ1000 family expands 10-Gigabit Ethernet in the data center by enabling low-cost copper connectivity with familiar RJ45 Jack
Aquantia, has announced the sampling of the AQ1000 family of PHYs, the first 10GBASE-T PHYs that meet the requirements of volume platforms such as servers and aggregation switches within the data center. By enabling copper 10GE connectivity within the data center, Aquantia’s new devices permit familiar RJ45 and copper cabling to deliver the benefits of 10GE without the costs and complexities of the XFP or SFP+ alternatives.
“The 10GBASE-T standard has been around for some time, but the first products were more proofs-of-concept than high-volume production vehicles,” said Jag Bolaria, senior analyst at the Linley Group. “Aquantia’s new PHY products will reduce power dissipation sufficiently to kick off the start of volume deployments by server and switch vendors.”
Aquantia’s AQ1000 family of 10GBASE-T PHYs features low power in a compact 21mm BGA package. These are monolithic designs implemented in a proven 90nm CMOS process. The innovative architecture delivers the low power of 5.5W for a max distance of 100m of Category 6A cable. This low power enables 10GBASE-T within mainstream applications such as dual-port NICs, 16-port line cards, and 24-port aggregation switches. This is the first low-power monolithic 10GBASE-T PHY to be sampled into the marketplace. The AQ1001 offers single-speed 10GE operation and is sampling now.
Multi-rate 100M/1GE/10GE and Wake-on-LAN (WOL) capabilities will be featured in the AQ1002. The AQ1002, which is socket- and firmware-compatible with the AQ1001, will be sampling within the third quarter.
“Our goal from the outset was not just to design low-power 10GBASE-T silicon suitable for demonstrating technology, but also to meet the market’s requirements for volume manufacturability and deployment,” said Phil Delansay, president and CEO of Aquantia. “Such low power in 90nm demonstrates the merit of Aquantia's differentiated architecture. In achieving this goal, the AQ1001 product line marks the beginning of real-world deployment of 10GBASE-T in data center and enterprise applications.”
EN-Genius Says…
It’s so much fun to cheer for the Little Guy: especially when, as in Aquantia’s case, they actually stand a decent chance of winning. Although they have been painfully guarded about any details on the inner workings of their AQ1001 and AQ1002 10GBASE-T copper PHYs, the few tidbits Aquantia’s shared with me (and the fact that they have working silicon) have convinced me that they could be one of the prime forces in this emerging market. The limited insight I have into the AQ1001 architecture is insufficient to give you a tour of its innards but I can share with you a few of the things that assure me that it will work somewhere close to as-advertised. There are also several other clever things that Aquantia’s done that should help differentiate their parts in what promises to be a highly-competitive market.
Some of this differentiation is expected to be in the form of performance, due in no small part to their carefully-designed analog front end and signal processing circuits. Although Aquantia would not comment, it’s likely that Aquantia is using some sort of a digitally-controlled analog scheme for its equalizers as well as the NEXT, FEXT, alien crosstalk, and transmit cancellation circuits. (Without a hybrid scheme it’s likely that the many channels of brute-force digital cancellation [each running at 700 Msample/s] would push a design towards the 25 W that many pundits expected a 10G copper PHY to draw when the IEEE originally introduced the spec.) They are also very proud of their low density parity check (LDPC) engine that is expected to provide the equivalent of more coding gain when recovering signals under difficult conditions.
The powerful LDPC engine and its high-quality analog front end are primary reasons that their customers are expecting the AQ1001/2 to deliver BERs in the neighborhood of 10E-15 under laboratory conditions, around three orders of magnitude better than the 10E-12 requirement set by the 802.3an standard.
This extra margin is very important for 10GBASE-T products because they will be used in potentially unruly corporate environments that are far less friendly than the relatively well-controlled environs of a traditional data center. As 10G migrates to backbone nodes in wiring closets and eventually to the desktop (it’s not that far away), it’s very likely that the average network will have its share of sub-standard connector terminations and over-length cable runs and that 10GBASE-T will be expected to cope with it. While auto-negotiation will allow a 10G line card or switch drop the data rate to 1Gbit/s for worst-case offenders, customers will still expect their equipment to make a best effort to deliver full-rate service under less-than-ideal conditions.
Although the basic single-speed 6.5 W AQ1001 that’s sampling today is in part the result of a late-schedule strategy adjustment, Aquantia has used it to their full advantage to ensure their design is totally compliant (plus a little more) and to implement a few things they learned on the pin-compatible full-featured AQ1002 that scheduled to sample later this year (2008). Besides adding the triple-speed and wake-on-LAN features, the AQ1002 is expected to benefit from the lessons learned on the AQ1001 with a 1 W drop in operating power.
It should be noted that the 6.5 W and 5.5 W power consumption figures are average levels for a chip driving a full 100 m of Cat-6A cable with four RJ-45 connectors in the signal chain. Aquantia architecture permits the chip to turn off sections of its signal processing blocks and reduce transmit signal levels under less challenging line conditions. Since both parts are fabricated using a 90-nm process, so we can also expect further power savings in future products built at 65 nm. A process-related power reduction will be tougher for SolarFlare to pull off since their 10Xpress 9001 10G copper PHY (reviewed here April 14 2008) that draws 6 W is already being manufactured in 65 nm.
Aquantia 10G PHYs will also provide a couple of other important features that should help set it apart in a market that I expect to become quite competitive shortly. For one thing, the AQ1001 and AQ1002 front ends do not require the external hybrid circuits usually required to couple the transmit and receive circuits together for each full-duplex wire pair. This represents significant savings in both BOM cost and board space that will become important even before the 10GBASE-T market heads towards commodity status in another 18 - 24 months. Both PHYs also sport a superset of the IEEE-required MDIO register set that provides data for line analysis and receiver performance diagnostics. The registers can be accessed via a simple GUI or API that Aquantia will provide to its customers. Besides making development and debug easier, these built-in diagnostic capabilities should greatly simplify production testing and trouble-shooting of equipment once it’s out in the field.
The AQ1001/2 XAUI-based system-side interface and standard IEEE MDIO registers allows them to bolt up to any 802.3-compliant MAC/controller. This would include Intel high-volume motherboard applications, and NIC-oriented devices like Mellanox, NetEffect, Cortina, NetXen, Tehuti, Chelsio, and Server Engines. I asked whether moving to 65 nm would give them the lower power and higher level of integration required to deliver a single-chip 10G MAC/PHY solution to address motherboard applications that the market could be demanding within the next 18 - 24 months. The folks from Aquantia who were briefing me declined to give me a straight answer but I wouldn’t be surprised if something like this was in their near-term development roadmap.
It’s too early to say for sure whether 10GBASE-T will gain the widespread acceptance predicted by many industry experts or whether the rapidly-dropping prices of SFP+ optical modules will limit its market penetration. If any lessons can be drawn from past history, I’d suspect that the copper PHY familiar requirements and low cost will give it a good chance of dominating the market in sub-100 m applications. This will be especially true if Aquantia and its competitors deliver on their promises for low-power operation and better-than-minimum performance.
While companies like SolarFlare and Teranetics have a year or two more street experience and are now introducing their second-generation products, it looks like the Aquantia strategy of taking a deep academic approach to solving some of the thornier problems of shoving 10 Gbit/s down a set of twisted pairs has allowed them to deliver a very competitive one-chip solution on the first spin. The company’s reluctance to share some critical details of the architecture and technology make it difficult to fully evaluate whether it can deliver on all its promises, but the few insights they were willing to share and the design team’s deep technical knowledge give me enough confidence that I’ve only added a half-Saltshaker to their baseline Vapor Index Rating.
The Aquantia AQ1001 10GBASE-T PHY is sampling, with production scheduled for July 2008. The pin-compatible AQ1002 sampling Q3 2008, with production volumes anticipated for Q4 2008. Aquantia declined to supply pricing but it would be logical to assume that it will track Solar Flare’s stated sample pricing of “under $100, with substantial volume discounts.”
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