networkZONE Products for the week of June 11, 2007
Mindspeed Technologies Says…
Dual-Core Packet Processors Deliver High-Throughput, Carrier-Class QoS for Sophisticated Customer Premise Applications
Mindspeed Technologies, Inc. has announced a new family of dual-core packet processors that will enable service providers to cost-effectively support sophisticated applications, high-performance packet processing and quality of service (QoS) for the triple-play broadband home and small and medium-sized enterprise (SME) markets.
The Comcerto 100 Series of packet processors brings the field proven, carrier-class performance of Mindspeed's integrated system-on-chip (SoC) architecture to the customer premise gateway market. The new family of devices will enable service providers to deploy sophisticated, reliable services with the high-packet throughput required for delivering next-generation multimedia content to their subscribers.
"Our new Comcerto 100 Series provides unprecedented price/performance in a range of pin-compatible devices that will allow customer premise equipment (CPE) manufacturers to design a family of advanced gateway solutions using the same software architecture to support broadband home routers, enterprise service routers, and high-end integrated access devices," said Preet Virk, vice president and business director of Mindspeed's CPE products.
"With CPE equipment based on our Comcerto 100 Series packet processors, service providers will have the application and performance headroom they need to deploy new revenue-generating services to their broadband home and SME subscribers with capabilities such as sophisticated data routing with QoS, carrier-class voice-over-IP (VoIP), IPv6 support, virtual private networks with firewalls, 3DES & null SHA-1 support, packet filtering, as well as 802.11n Wi-Fi and WiMax data rates support for wireless home entertainment networks," Virk added.
Mindspeed designed the Comcerto 100 Series to deliver carrier-class performance at competitive price points by integrating the industry-standard interfaces required for gigabit bandwidth with a secondary cache to optimize operating systems and applications performance, a security processor, dual ARM processors, sophisticated DMA engines, an internal bus architecture and on-chip memory to boost packet throughput. Its flexible, programmable architecture allows either or both ARM cores to be used for applications or packet processing, enabling equipment manufactures to offer multiple solutions tailored for specific deployments, and service providers to download software updates as new media content and features are introduced.
Technical Details
The Comcerto 100 Series device architecture includes a pair of high-performance ARM 11 processors, a security engine, a 64KB on chip memory, a 128KB L2 cache, plus a 64-bit wide, 165MHz multi-layer interconnect bus and built-in QoS and traffic management capabilities.
The packet-processing ARM core runs standard ANSI C code to enable efficient programming and downloading of algorithms to manage evolving media content delivery requirements. For example, it has the flexibility and performance to run the evolving software for 802.11n routing, deep packet inspection for packet filtering and classification while simultaneously meeting the delay, jitter and latency requirements of real-time services.
The application ARM processor runs all standard operating systems and off-the-shelf applications. All I/O functions are handled automatically via hardware assist with on-chip buffers to reduce bus contention. The use of DDR2 memory lowers total-system cost, and the ability to address 1GB of memory space gives service providers the flexibility and room to deploy the most sophisticated network infrastructure management applications and user services on the platform.
The Comcerto 100 Series also features comprehensive high-performance interfaces for advanced networking and connectivity applications, including dual Gigabit Ethernet interfaces, PCI Bus, USB2.0 with PHY, TDM, and UTOPIA L2 interfaces.
The new family runs OpenWrt Linux distribution and the same field-proven VoIP software suite developed for Mindspeed's Comcerto carrier VoIP processor family. To improve customers' time to market, a complete reference design, including hardware and software is available. Customers also have access to a large number of third-party software and hardware offerings through Mindspeed's OpenMind developer's program. The OpenMind program gives customers access to design expertise, proven operating system and software applications, and off-the-shelf and customized hardware, software and system solutions.
EN-Genius Says . . .
It's good to see Mindspeed getting back into the comms game with a fresh take on its product line after a long quiet period. While they have not abandoned their traditional bread-and-butter generic WAN building blocks, this multimedia CPE gateway-on-a-chip is one of their first products of their new focus on higher-end, higher performance multi-service access and CPE solutions for carrier and enterprise applications. The Comcerto 100 Series platform brings several key elements like their well-proven Comcerto 7/8/900 communication processor (originally developed for high-density voice processing at the carrier edge), to access applications where it delivers multiple channels of HDTV plus voice, Internet and in-house networking over nearly any broadband connection (E/GPON, VDSL II and fixed WiMAX ).
 Although it does not have the massive array of voice processing engines that its larger cousins do, the four-layer high-speed interconnect bus and the pair of ARM-11 RISC engines at the heart of Mindspeed Comcerto 100 are borrowed almost directly from those earlier series. The difference in this application is that only one of the ARM cores is used as a control plane processor while the other core serves as the gateway media stream processor (see Fig. 1). The control plane core is equipped with generous portions of L1 & L2 cache plus a large chunk (64 k) of on -chip SRAM to minimize stalling. The second ARM-11 has a DSP-enhanced instruction set that helps it perform media stream processing tasks. It is also responsible for all the QoS management tasks although some classification (by port number) is actually done at the MAC layer -- a nice way of saving the CPU a lot of unnecessary lookup tasks.
The interconnect bus knits both cores together with the WAN-side and LAN-side interfaces as well as a TDM telephony bus, a hardware security processor, a DDR2 memory controller, and a PCI host connection. Because it is multi-layered, the bus can support up to four simultaneous non-blocking core-to-core, core-to-peripheral, or peripheral-to-peripheral connections. Although the block diagram above shows the DMA controller as a single block, the actual DMA logic is somewhat distributed. The multi-channel DMA engine in the diagram supports multiple zero-copy transfers with either RISC core and the high-speed LAN/WAN interfaces, while most of the lower-speed PHYs hanging off the bus have their own DMA controller. Likewise, traffic from the TDM engine (2 - 8 MHz, up to 128 time slots) is handled by its own DMA engine to minimize jitter and latency. Despite the punch it packs, power consumption is quite low at 2.3 W (typical), even with all cores blazing at full speed. Mindspeed says that its hardware power control logic can usually cut this down significantly by invoking slower speeds or even suspending the operation of under-used blocks.
Mindspeed has recognized that USB is rapidly becoming a heavily-favored peripheral connection for consumer applications and has provided a pair of USB 2.0 OTG interfaces for that purpose. They have integrated PHYs and can support everything from memory sticks and peripheral interfaces (printers, faxes) to networked storage. Software stacks to make networked storage easy and straightforward are available from both InToto and Jungo.
Speaking of programming, the dual-core architecture was designed to use an open programming model that works with nearly all open-source tools and OSs including Linux and NetBSD. There is also a Wind River VxWorks package available. Mindspeed is almost as aggressive about open-source support as my friends at Freescale and has made arrangements to have a version of the Asterix OpenPBX software (including protocol stacks, drivers, etc…) and the OpenWRT router application available for free. They also supply pre-developed licensable HW/SW reference designs for specific target applications such as Broadband VoIP routers and IADs.
Given the IP they had lying around, it's not surprising that Mindspeed chose to use separate processors for the control and data plane applications in their new CPE family. They also make a credible argument that using a separate service and stream processor makes for simpler programming than the single-core, approach taken by the PMC-Sierra MSP7100 gateway platform which uses a MIPS-derived multithreading packet engine for both fast path processing and control processing. I think that there are good arguments to be made on either side of the debate including Mindspeed claims that a multi-thread approach carries the potential for non-deterministic behavior and entails some extra management overhead. On the other hand, PMC seems to have taken great pains to provide an operating system and tools that minimize, or eliminate these issues.
Truth be told, I am not sure you'd see a performance difference except in corner-case applications where Minsdpeed's extra processing power, larger L1 cache, its L2 cache (PMC does not have one), and faster DDR2 memory interface might come in handy for pulling out large numbers of IP video and IP telephony streams from a tightly-filled broadband pipe. I am less equivocal about Mindspeed's emphasis on open software tools and its OpenMind development ecosystem which does provide more value and flexibility for its customers. If you really want the PMC side of the story on this, check out my June 2006 review.
There are several other respectable contenders for the CPE sockets Comcerto 100 is gunning for, including Cavium, Freescale and Intel, but the only other one I see as a direct threat is Ikanos' recently-introduced Fusiv processor. Mindspeed acknowledges that the hybrid (single RISC core with multiple fixed-task hardware engines) gives it the ability to do sophisticated QoS and media stream processing at 100 Mbit/s data rates, and that its on-chip VDSL2 data pump offers a great value -- especially to its existing customer base. On the other hand, Mindspeed raises some valid concerns that Ikanos proprietary programming model could make its software less flexible and anything but its standard reference design applications significantly more challenging to develop and maintain. For more a bit more perspective on Fusiv, check out my April 2007 review.
Despite the strong competition, I think that Mindspeed has a good shot at taking a nice bite out of the CPE market because of its powerful architecture, emphasis on open software and a strategically-sized family of products that should help designers buy only the performance and features they need for a given application.
The Comcerto 100 Series is sampling now in four configurations with an extensive set of feature options. Volume production is scheduled in Q3 of 2007. Prices range between $13 and $39 per unit in OEM quantities.
Data Sheet
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