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networkZONE Products for the week of June 16, 2008
Xelerated Says…
HX300 Family of NPUs and Programmable Ethernet Switches to the Fiber Access Market
Family extends technology platform with Ethernet switching and integrated traffic management to enable FTTx mass deployment
Xelerated, the global leader in field-proven Carrier Ethernet ASSP-based chipsets, announced its next-generation HX300 family of high performance network processors with integrated traffic management and fully-programmable Ethernet switches. It brings new levels of integration and flexibility to the Carrier Ethernet market, and enables mass deployment of advanced Fiber Access solutions while significantly reducing solution costs.
The HX300’s multilayer programmable Ethernet switches represent a breakthrough in integration and design flexibility. This combination of switching and processing functionality enables the development of service-aware applications that readily adapt to changes in network conditions and optimize performance.
The HX300 family offers the low cost and power efficiency of custom designed ASICs, while bringing the NPU advantages of reduced time-to-market and value differentiation through software. The Xelerated Dataflow Architecture is the only packet processing architecture in the industry that delivers wirespeed deterministic performance with programmability. It is the first and only NPU architecture that scales to 100 Gbits/s full duplex. Based on the same Xelerated Dataflow Architecture employed in previous generation devices, the HX300 family provides a uniform management method and common programming environment across the range of fiber access and carrier Ethernet products. This enables network equipment vendors to leverage their development expenses across Core, Metro and Access platforms.
The advanced standards-based egress traffic management and the tight integration of the Xelerated Dataflow Architecture enables the HX300 family to support a QoS-aware distributed traffic management model for either chassis-based switching systems or meshed configurations. Triple play services are enabled by a flexible queue allocation and programmable hierarchy that enforces per-flow, per-subscriber, per-class Service Level Agreements and bandwidth guarantees.
As carriers’ complete initial deployments of fiber access based technologies like Active Ethernet, GPON and EPON, they face operational and economic challenges to mass deployment of these networks. Significant increases in backhaul bandwidth and escalating QoS requirements of IP communications and service availability are driving new requirements for aggregation platforms and the need for extending Carrier Ethernet services in the access network. The highly integrated and cost-effective HX300 extends Carrier Ethernet into first mile applications for both residential and business access.
“Xelerated’s new series of programmable Ethernet switching devices is well positioned to capture design wins in the emerging fiber access market. Embedding the company’s core dataflow processing technology in an Ethernet switch delivers unique flexibility at low cost, both of which are key for system vendors,” said Bob Wheeler, senior analyst at The Linley Group. “Xelerated is poised for rapid growth based on its metro design wins, and the fiber access market represents a sizeable opportunity for the company.”
The HX300 family includes three core series: HX310, HX320 and the HX330.
- The HX310 consists of programmable Ethernet Switches for fiber access aggregation switches, GPON/EPON linecards, EADs.
- The HX320 Series is an NPU for CESR, Service Routers, Legacy Systems, 100 GE, 40 GE and OC-768 applications.
- The HX330 is an NPU with integrated Traffic Manager for CESR, Service Routers, GPON/EPON linecards, xDSL aggregation.
The HX300 family is extremely flexible. It enables fixed-port, stackable and chassis- based networking systems that can be configured in mesh, ring, star, dual star and stackable topologies. The HX300 integrates 100-Gigabit, 40-Gigabit, 10-Gigabit and 1-Gigabit Ethernet ports. The HX300 is binary software-compatible with custom and Metro Ethernet Applications (MEA) that have already been developed for Xelerated’s X10 and X11 NPU families.
“With the introduction of the HX300 family of products, we are extending our technology platform with two innovative technologies – programmable Ethernet switching and advanced traffic management – representing a breakthrough in integration, design flexibility and application awareness,” said Thomas Axelsson, CEO of Xelerated. “The Xelerated team has put deep thought into each and every one of these products, and we are confident that the launch of the HX300 line will clearly state our position as a leader in the Carrier Ethernet market – as well as the emerging fiber access market.”
EN-Genius Says…
When I first reviewed the Xelerated network processor in 2002 I was impressed at how much more efficient its deterministic pipeline architecture was at handling repetitive inspection, classification and modification of packets than the RISC-based cores that powered nearly all the other NPs at the time. Nevertheless, I worried that the small size of the company and the challenges of programming these unusual devices might prove to be real obstacles to winning customers. That’s why I was surprised (and pleased) to see the subsequent products like their Ethernet-oriented X11 processor (from November 2004) help the company gain a substantial chunk of market share that’s allowed it to thrive as most of the other devices that used to occupy that once-crowded market are now gathering dust. Now, the same architecture that has made Xelerated so formidable in 24xGE enterprise, and mixed FE/GE metro Ethernet applications, is appearing in a new family of NPs and, interestingly enough, Ethernet switches that are designed to address the fiber access market. At first glance it seems sort of odd to use the pipeline processor within a switch; but, as you’ll see, it makes sense when you take a closer look.
Like their predecessors, both HX3xx processors are built around a chain of 64-byte wide processing elements that perform a single operation (inspection, classification, modification) but do it at wire speed. Each incoming packet is cascaded from stage-to-stage along with a header tag that triggers a specific operation to occur. The processor ability to flexibly allocate its bandwidth between egress and ingress queues allows it to optimize the handling of asymmetric traffic found in the access network.
 The pipeline processing elements can also make use of several dedicated on-chip resources including TCAM, a hashing engine, and several programmable look-aside engines. Packet buffering and memory for the look-aside engines is handled via multiple external SRAM and DRAM interfaces. Although an on-chip TCAM can support most lookup operations, an external TCAM can be added to handle large ACLs.
Perhaps the most obvious differences between the X10/Xll series and the new HX330/HX320 processors is their larger capacity, allowing a processor/switch pair to support up to 50 Gbit/s worth of full-duplex traffic without oversubscription. The SerDes-based line-side and system-side interfaces have been beefed up to match with 64 lanes that can be mixed and matched to support various combinations of 1 - 10 Gbit Ethernet or 40 Gbit/s Interlaken interfaces. When configured for uni-directional operation, a pair of HX300-class processors can support full-duplex operation at 100 Gbit/s.
This increased throughput was largely made possible by moving from a 130-nm process to a 65-nm process that’s boosted the HX3xx series maximum clock speed to around 322 MHz. The smaller geometry also allowed Xelerated to bump their pipeline length up from around 200 to 512 stages, eliminating the need for multiple passes that earlier products needed for some complex operations. Of course, the longer pipeline means that the processor has some added latency between input and output, but the higher clock speed allows for 2.5x more processing while adding only around 60% more delay.
The result is a solution that can comply with SLA for fiber access end-user applications with advanced policing and shaping using either single- or dual-leaky bucket techniques. Traffic is shaped after egress classification according to a 5-level programmable hierarchical queuing scheme that can enforce committed and best-effort data rates on a per-flow, per-subscriber, or per-class basis. The HX330 on-chip traffic manager provides guaranteed QoS using WRED, SDWPR, or Strict Priority techniques that conform to the service and bandwidth profiles from MEF, TR101/TR59, FSAN, and Diffserv. If your design calls for an external traffic manager from Dune, or some other source, you can opt for the HX320 series which eliminates the HX 330 integrated manager.
Xelerated HX310 series of programmable Ethernet switches use a traditional shared memory fabric coupled to a 416-stage pipeline packet processor very similar to those found in the NX320/330 products. Besides the normal switching functions you’d expect from a L2/L3 device, it handles labeling, tagging, and packet modification. The processor can also perform basic output and input shaping although most of the sophisticated traffic shaping is handled by the traffic manager. If needed, the processor can be bypassed on a packet-by-packet basis to give high-priority low-touch traffic a cut-through path. The HX310 on-chip OAM processing logic and hardware IEEE 1588 (synchronous Ethernet) time code logic will give it a big advantage in carrier-class equipment designs: especially in wireless back haul applications.
The switch 64 SerDes lines can be configured as SGMII MAC interfaces for 100/100g Ethernet applications or as a XAUI/SPAUI/ interface for line card applications. The SerDes lines can be programmed for custom configurations to enable glue less attachment to non-standard legacy backplanes or ASICs.
There are four 10G uplink ports on the switch system-side interface that can be used to connect multiple switch chips across PCBs or backplanes. If you need to build a larger fabric, it can be scaled into a single-stage full-mesh of up to 5 chips or connected in ring topologies of unlimited size (depending on how much over subscription you can tolerate). The HX310 can also be used as part of a dual-star topology with up to 7 cards. When configured as XAUI or SPAUI interfaces, the ports can allow the switch to serve as a smart front-end for larger switch enterprise-class or access fabrics (BRCM or Fulcrum) or carrier-grade switches (Dune or ASIC). System-side interface can also be configured to support Interlaken interface at 10G, 40G or 100G.
Both the switches and network processors come with production-ready data plane reference code for Carrier Ethernet that has been extended to support fiber access applications. Although the switch is more focused on fiber access applications, all products are available with software to support key features for other optical access networks (Metro Ethernet OA&M frames, carrier Ethernet VLAN tags, Synchronous Ethernet), and deliver enough processing power to handle sophisticated access control, as well as layer-2 NAT (for protecting main access tables) and consolidating MAC addresses.
Like their predecessors, the new processors and switches use their unusually efficient architecture and high levels of integration to trim the cost and power out of whatever applications they target. While Xelerated would not talk about specific pricing, they did say that their estimated solution cost for a complete HX300-powered GPON port (i.e., a combined ONT and OLT) would be around $100, a dramatic reduction over the $400 they say you’d pay for equivalent functionality today. They also feel that they can terminate Active Ethernet connections for around $20 per GbE port: much less than the $100 they estimate today’s solutions cost.
The HX300 family will begin sampling in Q4 2008, along with a software development kit and a Metro Ethernet access reference design. Developers will be able to get a jump-start with a full suite of application software that is scheduled for delivery during Q3 2008.
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