networkZONE Products for the week of July 31, 2006
Ikanos Says…
Ikanos IPTV-Optimized, Multi-Mode VDSL2 Solutions Feature Integrated Classifier/Scheduler for all QoS-Critical Applications
Ikanos Communications, Inc. has introduced the industry's first IPTV-optimized, multi-mode VDSL2 chipsets for Central Office (CO), Remote Terminal (RT) and Customer Premises Equipment (CPE). These fifth generation chipsets are designed to provide the highest throughput and density, with the lowest power consumption per port. All chipsets offer integrated QoS capabilities as well as enhanced impulse noise protection schemes for optimal IPTV delivery. The multi-mode products consist of:
- The Fx100100-5 CO/RT chipset and the Fx100100S-5 CPE chipset, which support all VDSL2 profiles -- 8a, 8b, 8c, 8d, 12a, 12b, 17a and 30a -- and are optimized for 30 MHz spectrum operation to offer 100/100 Mbps performance, and
- The Fx10050-5 CO/RT chipset and the Fx10050S-5 CPE chipset, which support VDSL2 profiles - 8a, 8b, 8c, 8d, 12a, 12b and 17a - and are optimized for 17.6 MHz spectrum utilization to offer 100/50 Mbps performance.
True Plug-and-Play Multi-Mode
All chipsets comply with mandatory and optional features of the VDSL2 (ITU-T G.993.2) standard. Both CO and CPE chipsets also support VDSL1 (ITU-T G.993.1), ADSL (ITU-T G.992.1), ADSL2 (ITU-T G.992.3) and ADSL2+ (ITU-T G.992.5) and offer true plug-and-play multi-mode operation per port. The chipsets support all band plans that are defined in the standards for their respective profiles. Additionally, in anticipation of future carrier requirements, these chipsets are the first in the industry to potentially support all the band plans that are being defined in European, North American and Asian standards groups.
First to Offer IPTV and Triple Play Features
Ikanos' multi-mode chipsets are the first in the industry to offer many new features for optimized IPTV delivery and unsurpassed triple play experience. These features include:
- Available, on-chip classification, queuing and scheduling for enhanced Quality of Service (QoS), with IPv4 and IPv6 support for best-in-class IPTV, VoIP, and video gaming;
- Seamless Dynamic Rate Repartitioning (DRR) for real-time, demand-driven reallocation of bandwidth between different services on the same line, enabling each consumer in the same household to get the best triple play experience;
- Support of dual latency, dual interleaving over all network interfaces, which allows carriers to select optimal impulse noise protection (INP) and traffic latency for their service requirements;
- Maximum interleaver and deinterleaver memory for highest impulse noise protection, resulting in the most robust IPTV delivery; and
- Erasure detection and decoding for even more enhanced impulse noise protection.
"Ikanos' fifth generation chipsets offer highly differentiated features that are essential to deploy triple play services and IPTV," said Jeff Heynen, directing analyst, Broadband and IPTV, Infonetics Research. "Ikanos continues to raise the bar by developing and offering compelling products that simplify the deployment of complex bundled services and enhance subscribers' interactive broadband experience."
Highest Density and Performance
The pin-compatible Fx100100-5 and Fx10050-5 CO/RT chipsets consist of:
- An 8-port Burst Mode Engine (BME) with all relevant interfaces (RMII, SMII, SS-SMII, POS-PHY-L2 and POS-PHY-L3) for interworking with cost-effective 10/100 Ethernet switch chips or high-performance network processors, allowing system vendors to maintain their current architecture and minimize development costs and time to market;
- A 4-port Analog Front End (AFE) with high-performance, low-power, analog-to-digital and digital-to-analog converters;
- A 4-port Integrated Front End (IFE) with on-chip filters and amplifiers for enhanced performance and long range operation; and
- A 2-port line driver with integrated adaptive hybrid that supports all transmit power requirements (11.5, 14.5, 17.5 and 20.5 dBm) of VDSL2 profiles, enabling higher performance and reach in the presence of multi-pair crosstalk.
The four-chip architecture enables the industry's best density, 48 ports, in small form-factor, power-constrained line cards. Pin compatibility between chipsets is a feature designed to ensure that system vendors can develop one platform for worldwide deployment, thus reducing their development costs and time to market.
The pin-compatible Fx100100S-5 and Fx10050S-5 CPE chipsets include the following:
- A single-chip BME with MII, RMII and Utopia interfaces for use in cost-effective, standalone bridge modems, as well as processor-based gateways and routers;
- An Integrated Front End (IFE) with on-chip ADC and DAC, amplifiers and filters for enhanced performance and long-range operation; and
- A line driver with low-noise amplifier (LNA) for best performance.
All chipsets use the Ikanos Programmable Operating System (iPOS), which consists of firmware and OS-independent APIs to enable fast time-to-market. All CO chipsets are designed to be fully backward compatible with previous-generation deployed CPE and all CPE chipsets are designed to be fully backward compatible with previous-generation deployed CO equipment, which ensures a smooth upgrade path for carriers.
"NEC-Magnus has successfully used Ikanos products and technology for over four years," said Yuji Kubota, General Manager, Network Access Products Business, NEC Magnus Communications, Ltd. "We selected the Fx100100-5 and Fx100100S-5 chipsets for our next generation platforms as they offer the industry's best features, performance and flexibility for delivering VDSL2 and triple play services."
"We're increasing our lead in the multi-mode VDSL2 chipset market with our fifth generation IPTV-optimized products," said Rajesh Vashist, chairman and CEO of Ikanos Communications. "Our new chipsets bring value for OEMs and carriers with added features that enable IPTV."
EN-Genius Says . . .
Everyone is slavering over the opportunities expected to arise from the FTTx and triple-play schemes being rolled out across the US, Europe and Asia, but Ikanos seems to be doing something about it with their new VDSL2 CO and CPE chip sets. Their new products combine their traditional ADSL/VDSL PHY-layer expertise with new insights on managing QoS at the link/PHY layer to deal with issues that are expected to arise as traffic shifts from e-mail and web pages to latency-sensitive multimedia services such as VoIP and HDTV/IPTV. Besides the demands of downstream voice and video, they have made sure their new device is smart enough to give quick passage to critical control traffic (such as ACKs, IGMP-based channel changes, plus CPE management, and diagnostics) which also need very low latency and high integrity.
Triple-play broadband services are still in their infancy, and I suspect we will see some very interesting QoS issues arising as commercial services attempt to dole out just enough bandwidth to maintain the services consumers pay for without the cost of over-provisioning. While I suspect that there will be several intelligent solutions emerging to provide the fine-grained QoS necessary for efficient multimedia delivery, I think the Ikanos approach to solving these problems as close to the wire as possible is a smart one that deserves a closer look by anyone involved with designing VDSL2 equipment.
As with earlier generations, the Ikanos CO side chip set consists of an 8-port Burst Mode Engine (a data pump to you), a 4-port analog front end (includes DACs/ADCs) mixed-signal CMOS, a 4-port integrated front end (includes filters, VG/PG amplifiers) mixed-signal CMOS, and a 2-port Line driver/LNA with an integrated adaptive hybrid that allows it to match international standards for line impedance and signal levels (bipolar). Although it's probably not fashionable to say so, I think Ikanos was smart to segment the chip set so that the data pump is built in bulk CMOS, the AFE and IFE in mixed-signal CMOS, and the line driver in bipolar. This allows them to put the more expensive technologies to work in relatively small chips where they can yield significant performance advantages over more integrated solutions. Separating the line amp and IFE also has the added advantage of keeping noise out of the system.
But the real news here is the multimedia support at PHY layer, something that may be an industry first. The device's on-chip classifier can be programmed to decide priority on specific VLAN tags, queue-in-queue fields, 802.1p, PPPOE, IPV type and others. It can classify by protocol using the TOS and DSCP fields. Knowing the type of service associated with a particular packet allows the device's 4-queue scheduler to use this information to place it in the transmit queue on the basis of its specific priority and latency requirements using strict priority, WRR, and other queuing options. Both the CO and CPE products support dynamic rate repartitioning that enables on-the-fly allocation of bandwidth as video and voice channels are set up and torn down on the subscriber's connection.
Ikanos offers three software platforms for their new VDSL platform with varying degrees of support for multimedia services which can also include support for IPv4/v6, VLANs, Queue-in-queue, and EFM (Ethernet in first mile) pre-emption which holds standard data to let voice and video through.
The more tightly-integrated 3-chip sets (a data pump/BME, and IFE and an AFE with integrated line drivers) single-channel CPE modem chipsets have similar features to their CO-side counterparts but they perform classification and QoS on the upstream data stream. As with earlier CPE products, they include MII and RMII interfaces for Ethernet connections as well as a UTOPIA interface to make inter-system hook-ups a snap. Cost-conscious designers will appreciate the fact that the BME's DSP has enough processing capability to handle initialization and control plane management functions without having to tap an external host processor. Likewise, the on-chip buffer memory and integral flash for program storage helps keep BOM costs low.
If you're looking for a multimedia gateway processor to support Wi-Fi VoIP and multimedia services in your RG or other CPE design, Ikanos suggests their Fusive processor whose design was acquired from ADI earlier this year.
All chipsets are available in sample quantities now. Production quantities will be available in late-Q3, 2006. The Fx10050-5 basic chipset pricing is $18.50 per port in sample quantities. The Fx10050S-5 basic chipset pricing is $19.90 per port in sample quantities.
The Fx100100-5 and Fx100100S-5, as well as QoS aware versions of these chipsets are priced slightly higher.
Data Sheet Fx100100-5; for DSLAMS, ONU's OLT's and Broadband Concentrators
Data Sheet Fx100100S-5; for Customer Premise Equipment
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