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networkZONE Products for the week of December 1, 2008
NetLogic Microsystems Says…
Hybrid Knowledge-Based Processor
Production Shipments of Industry First; Capable of Achieving 1.5 Billion Decisions per Second
The NL91024XT “hybrid” knowledge-based processor is optimized for 100Gbits/s designs, and features a revolutionary “hybrid” architecture that converges high-performance knowledge-based processing and superior low-power efficiency of its algorithmic Sahasra technology.
NetLogic Microsystems, Inc., the leader in the design and development of knowledge-based processors and high-speed integrated circuits, today announced production shipments of its NL91024XT knowledge-based processor, which is capable of achieving 1.5 billion decisions per second (BDPS) and is optimized for next-generation 100Gbits/s systems. As the latest member of NetLogic Microsystems’ fifth-generation knowledge-based processor family, the NL91024XT processor is a fully-programmable “hybrid” knowledge-based processor that features the convergence of high-performance, massively parallel knowledge-based processing with the superior low-power efficiency and flexibility of algorithmic Sahasra technology to dramatically reduce power consumption while delivering best-in-class performance and functionality for next-generation IPTV and advanced mobile wireless networks.
NetLogic Microsystems’ NL91024XT knowledge-based processor incorporates a new high-speed I/O design which delivers 100Gbits/s of raw chip-to-chip interconnect bandwidth, representing an improvement of more than 2x over competitive solutions. When coupled with the Intelligent Load Balancing Engine (ILBE), customers can achieve more than 150Gbits/s of effective bandwidth, allowing the NL91024XT processor to support the most performance-demanding switching and routing applications currently in design. This level of performance is necessary as architects develop system-level solutions capable of handling aggregate traffic rates of 100Gbits/s while simultaneously handling the high-levels of services and reliability required by the convergence of video, voice, data, and mobility, the emergence of Internet Protocol Television (IPTV), and peer-to-peer (P2P) communications.
Developed on TSMC’s advanced 55nm process node, the NL91024XT processor integrates 128 high-performance knowledge-based processing engines. In addition, the NL91024XT processor features an enhanced ILBE to efficiently allocate multiple tasks and communicate among all the 128 knowledge-based processing engines. The knowledge-based processing engines and ILBE are tightly coupled with integrated advanced Sahasra Algorithmic Engines (SAEs) to dramatically lower the power consumption of search processing in the NL91024XT “hybrid” knowledge-based processor.
Through design improvements and process enhancements, the NL91024XT significantly increases the performance of each of the 128 engines as well as the ILBE and SAEs, as compared to the standard NL91024 device. The result is the breakthrough performance of 1.5 billion ACL and QoS decisions per second, 25% faster than any previous NetLogic Microsystems device and 50% faster than any competitive device, all at very low power thanks to the advanced Sahasra algorithmic technology.
All members of the NL9000 “hybrid” knowledge-based processor family also integrate an innovative Range Encoding Engine (REE). The REE employs advanced one-hot and fence encoding algorithms to implement range encoding that allows customers to effectively double the efficiency of performing port range inspection.
“We’re pleased to announce production shipments of the industry’s first knowledge-based processor capable of achieving 1.5 billion decisions per second,” said Chris O’Reilly, vice president of marketing at NetLogic Microsystems. “As virtually all of our key customers are rapidly moving to 40Gbits/s and 100Gbits/s dataplane designs, our clear technology leadership with the NL91024XT processor is enabling us to provide the most advanced solution for an important part of wirespeed processing in the most demanding next-generation designs for enterprise networking, cable, wireline and wireless infrastructure.”
EN-Genius Says…
Between the strong probability that the demand for network bandwidth should continue to grow (albeit at a more modest pace) despite the present economic turmoil, and the fact that that there are still some things that conventional processor architectures are not really good at, NetLogic’s NL91024XT 100 Gbit/s search engine/processor is a welcome and timely product. According to NetLogic, they developed the processor on the basis of some very strong pull from their customers and partners (most likely, companies like Broadcom, Marvell, Xelerated, EZchip) to supply a 100 Gbit/s capable device that can handle the demands of equipment designed for metro access and mobile backhaul applications where protocols and applications are still in flux as services mature and evolve. Featuring higher throughput and some other minor performance tweaks, this pin-compatible upgrade from their earlier NL9K series of processors (reviewed here July 2008) is now able to deliver both the raw speed and the flexibility required for these still-maturing markets.
Like its predecessor, the NL91024XT is based on NetLogic’s clever Sahasra hybrid processor technology (described in detail here in a March 2005 review) but the new series overcomes some architectural limits that kept the previous generation from hitting the magic 100G barrier. Unlike some networking chip makers, NetLogic seems to use a relatively realistic definition of what constitutes a 100 Gbit/s stream. It’s not surprising that the processor is limited to L2 - L4 header processing at these speeds. What is surprising however is that it is rated at a full 100 Gbit/s for 15 - 20 searches per packet (depending on the length of the search term): even for those pesky 64-byte short packets that can bog down some other processing architectures. NetLogic also says that the new devices can compress forwarding tables and turn off selected cores for better memory utilization and power efficiency. Despite this, the device’s power consumption has scaled pretty much linearly with the increases in its throughput so now the typical for their highest-density part (which stores up to 3 M IPv4 entries or 750 k IPv6 entries) consumes around 8 – 10 W. While not cool-running by any means, I’d venture to say it’s about as low as you can get for a device that does this much processing and still low enough to consider for use even on power-sensitive ATCA blades.
This release complements NetLogic’s November 10, 2008 announcement of their NLP10000 100G PHY, a device based on technology they got from Aleuros when they acquired the company in early 2008. The PHY can drive a 100G connection over 40 km of single-mode fiber and across 100 m over multi-mode fiber for LRM applications. While similar to earlier Aleuros designs NetLogic worked with the PHY design team to bring the maximum speed of its 80-bit DDR interface up to 500 MHz. Although this is much faster than most commercial silicon can run, NetLogic made sure that the interface was quick enough to keep up with today’s top-tier ASICs as well as some Stratix/Virtex-class FPGAs that are currently in development. When I asked whether they felt this was about the limit for a DDR interface, the NetLogic representatives said that they were not sure but that they were also exploring the possibility of a serial interface for its next generation of PHYs.
The NL91024XT knowledge-based processor is available now in production quantities and will ship this year to multiple Tier One OEMs for use in advanced next-generation switcher and router products for triple-play and quad-play applications in networking, wireline and wireless communications infrastructure. Much to my dismay, NetLogic has declined to post much pricing or technical information about this product on its web site, and advises anyone who wants to know more to contact them at sales@netlogicmicro.com.
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