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networkZONE Products for the week of December 3, 2007
Cavium Networks Says…
Low-cost, Low-Power Multi-core Processor Accelerates Service Provider Gateway, SME and Storage Applications
The New OCTEON Plus CN50XX MIPS64 single- and dual-core processors enable high-performance, low power, fanless FTTx broadband access SME router and storage appliances
Cavium Networks has announced its OCTEON Plus CN50XX MIPS64 Embedded Processor family. The CN50XX single- and dual-core processors deliver up to 2x higher performance with up to 2x lower power consumption compared with the market leading OCTEON CN30XX processors, in a fully software and pin compatible fashion. These single- and dual-core OCTEON processors are currently designed into or are being designed into a broad range of tier-1 networking equipment, including next generation PON/FTTx gateways, enterprise routers and switches, UTM appliances, 802.11n WLAN access points, VoIP gateways, control-plane cards, internet café routers, IP set-top boxes and broadband access equipment.
“OEMs building broadband gateway and small to medium enterprise systems need to address increasing line rates both in the LAN and the WAN. Additionally, multi-function integration along with security processing has become a defacto requirement for new designs,” said Linley Gwennap, principal analyst at The Linley Group. “These requirements are driving the need for advanced, high-performance dual core processor architectures that provide QoS, packet processing and security in hardware while meeting stringent power and price points with head-room for future proofing.”
Next generation xPON/FTTx gateways are evolving into services platforms with high performance WAN and home networking requirements, such as robust triple-play voice, video and data processing with QoS, storage capability, GbE switching capability and WLAN 802.11n. For Enterprise/SME routers, in addition to high line rates, features such as L3-L7 security, Firewall, VPN, IDP, Anti-virus are becoming critical. In the wireless LAN AP market segment, 802.11n adoption is accelerating with requirement for high performance with security and QoS, along with extremely low power dissipation to fit within Power over Ethernet constraints. The new single- and dual-core OCTEON Plus CN50XX MIPS64 family addresses all these market requirements in a scalable, software-compatible fashion, while leveraging existing investments in OCTEON designs.
“Networking and Service Provider OEMs are looking for high-performance, highly-integrated, low-power and scalable processor solutions with an aggressive and feature-rich roadmap,” said Rajneesh Gaur, director of marketing at Cavium Networks. “Our new OCTEON Plus CN50XX processors along with optimized software solutions demonstrate an important milestone in Cavium’s support for our customers’ competitive and innovative products,” he said.
OCTEON Plus CN50XX Embedded Processors
The OCTEON CN50XX family consists of four different software- and pin-compatible parts with 1 or 2 cnMIPS cores, running at clock speeds from 300MHz up to 700 MHz, along with an integrated 128 KB L2 cache and DDR2 memory controller. CN50XX processors integrate next generation interfaces including USB 2.0, 3x Gigabit Ethernet, TDM/PCM and PCI. Furthermore, the processors include advanced hardware acceleration for packet processing, TCP, security and QoS hardware on both ingress and egress interfaces that enable high performance voice, video and data processing. The CN50XX delivers line rate 2Gbits/s of IP forwarding with NAT enabled, 1 Gbit/s VPN throughput, greater than of 350 Mbits/s of WLAN 802.11n, stateful TCP throughput, and up to 40 MBytes/sec of NAS performance in a single chip with leading performance/$ and performance/watt.
All CN50XX processors integrate hardware acceleration for packet processing, QoS, TCP and are available with optional acceleration for full set of cryptographic offload, including AES-GCM, SHA-2, RSA, DH with support for evolving wireless encryption standards such as KASUMI and storage data-at-rest encryption standard AES-XTS.
Cavium Networks provides a feature-rich software development kit with SMP Linux 2.6, GNU Toolchain, debugger tools, co-processor acceleration APIs and reference software for a range of wired and wireless networking, storage and service provider applications. The single- and dual-core OCTEON MIPS64 processors are supported by a wide range of software and silicon partners including, Arada Systems, D2 Tech, Entropic, Jungo, Kaspersky, Teknovus, WLAN, HPNA, UWB and video-encode-decode providers.
EN-Genius Says…
Cavium’s improved versions of -their to dual-MIPS core 30XX series are a market-savvy response to the growing amounts of intelligence and bandwidth being required of multimedia gateways used in both enterprise and broadband consumer applications. Although they have the same architecture and remain pin-compatible with their parent chips, Cavium says they have the additional processing power it takes to do the advanced packet inspection/firewall functions, and media QoS management for multiple voice and video streams, that’s expected in triple-play applications.
 Much of the speed boost in the CN50XX family comes from the faster clock speed (300 - 700 MHz vs. 200 - 300 MHz for the last generation) is the result of moving from a 130-nm to 90-nm fab process but the larger I cache (16 k) and D cache (32 k) certainly do their part to limit pipeline stalls and other memory-induced snags. While Cavium still uses the same crypto accelerator core as the last-generation, the faster chips have enough extra processing power to support firmware-upgrades to support emerging specs like SHA-2 and KASUMI.
The increased processing speed also means that it can support even the fastest Wi-Fi home networking connection. At the present time CN50XX processors support the 802.11n standard with reference designs for either Broadcom or Atheros Wi-Fi silicon but I’d really like to see them also support some high-performance devices like the recently announced from Metalink (see the August 2007 review).
In co-ax-based MOCA home networks, the dual-processor device can handle L3 forwarding and NAT at 800 Mbit/s (with mid-size packets) and pass traffic at 140 Mbit/s. This generation of processors still uses a native parallel PCI bus for the host interface but we can expect to see a serial PCIe option in subsequent family members.
CN50XX pin-compatibility with earlier chips allows you to use the same mature development boards software tools, and libraries of pre-developed functions. It includes Jungo’s very capable software development platform, D2 Technologies VoIP stack, Silicon Labs SLIC, Tech Novus PON device, and Entropic MOCA transceiver. Cavium says that they expect to offer a newer set of application-specific platforms for NAS and broadband gateways (wired and wireless) “some time soon.”
Cavium’s legacy tool set also includes the large library of reference software they’ve built up over the years. This includes a design for a Linux-based software RAID-capable NAS device that supports RAID5 transfer rates of 40 - 60 Mbyte/s on a dual-core processor (A single-core chip can write at around 37 Mbyte/s and read at 28 Mbyte/s). If you want to devote the Octeon MIPs to other applications, you can use a hardware RAID controller. The development package currently supports a Silicon Image controller but my briefers said that it would be relatively easy to cobble on the device of your choice.
 As the table that Cavium supplied indicates, the CN50XX family’s faster speed allows it to compare favorably against equivalent PMC and Freescale products (although PMC makes a very interesting case for their cost-effective multi-thread architecture). To keep my friends at Cavium honest, I’ll have to point out that their chart does not include Raza’s powerful XLS processors, even they may be the most formidable competition they face. Limited time and information don’t allow me to do a full side-by-side comparison here, but you can check out my February 2007 review to get an idea of why I consider them a potential competitor to the fine offerings from Cavium.
But regardless of who they are competing with for sockets in broadband multimedia gateways, SME routers, and other CPE, this a smart place for Cavium to be concentrating on because of the huge numbers of boxes that will be built to support advanced broadband services. It’s also well-timed because of the growing competition they will be facing in high-performance applications where their large multi-core products have been almost the only kid on the block until now. Many of the multi-Gbit/s packet processing, security, and deep inspection tasks that have been Cavium’s bread-and-butter in the past are starting to be performed by more specialized silicon and FPGA-based designs that draw much less power and make arguable claims of being more cost-effective. Given how well Cavium has done in powering everything from media gateways to Unified Threat Management (UTM) boxes (see the October 2006 review of the Octeon CN58xx family for details), I don’t expect them to lose the whole high-end market, but it’s good to see they are applying their expertise in other areas as well.
Cavium was uncharacteristically mum about pricing (perhaps that’s due to the more highly competitive arena these parts are intended to play in) and would only say that the CN50XX parts would be priced about the same as a speed-equivalent device from their earlier CN30XX family, with a modest premium to pay if you wanted something faster. The OCTEON Software Development Kit including Simulator, tool-chain, reference applications and networking software stacks is available now to partner companies. OCTEON CN50XX family processors and evaluation boards will be available in Q4, 2007.
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