networkZONE Products for the week of December 4, 2006
AMCC Says…
Next-Gen Framer/Pointer Processors Deliver Major Cost Savings and Line Rate Flexibility to Customers
Drava and Mura integrate multi-rate/any-input SERDES and framer/pointer processor/switching functions into a single device reducing costs, power and space up to 50% in many Metro/Edge-based MSPPs and optical cross connect OEM applications
Applied Micro Circuits Corporation has announced the company's next-generation framer/pointer processor devices, Drava (S4809) and Mura (S4819). Drava and Mura reduce overall system costs for customers by as much as 50 percent, when compared to previous AMCC offerings and other market solutions that require multiple devices to get 16 channels of OC-3/12 support with full transparency features enabled. Drava and Mura each integrate multi-rate SONET/SDH SERDES, switching, enhanced ring protection and transparency services onto a single device. AMCC has incorporated analog macros and large digital functions into these System-On-a-Chip (SOC) solutions, which meet all of the requirements of SONET/SDH standards and the rigorous demands of it customers, by leveraging its proven mixed-signal design expertise.
Drava and Mura are ideally designed for 5G and lower line card applications requiring framer/pointer processing functions, in particular the Multi Service Provisioning Platform (MSPP) and Optical Cross-Connect markets. Both devices provide unmatched complete overhead transparency services, including user-programmable remapping features, enabling the preservation of unique carrier switching and control management services.
Drava will offer up to a 50 percent reduction in cost, power and real-estate for Metro and Edge-based MSPPs line card applications via the implementation in 0.13 micron technology and the integration of SERDES, while providing unmatched levels of line-rate flexibility for up to 16xOC-3s, 8xOC-12s and 1xOC-48 client signals. Mura will offer even greater savings in cost, power and space for line card solutions in Metro and Edge-based MSPPs with only OC-3/OC-12 line-rate requirements.
"With their 5G and 10G SONET/SDH client signal capacity, respectively, Drava and Mura raise the bar for integration and flexibility of System-On-a-Chip (SOC) Add Drop Multiplexers (ADMs) and Time Division Multiplexers (TDMs) for Metro and Edge-based MSPPs and optical cross-connects," said Mitch Kahn, vice president of marketing for AMCC's ICP Transport Group. "Competing offerings lack the integrated SERDES function and/or the port density and multi-rate/any-input functionality, as well as transparency features offered by Drava and Mura, putting both devices in a class of their own."
Drava will support BLSR and MSPRing Ring Protection applications and provide a BLSR Express feature that speeds up K1K2 messaging around a ring. Drava and Mura will also support UPSR/SNCP protection schemes with full path overhead monitoring of client and line signals on up to 5G of client bandwidth; an on-chip 384x384 STS-1 level cross-connect with 4 configuration memories; internal and external configuration capabilities of the Cross-Connect memories; In-band and Out-of-Band consolidated Line/Path Signaling; Full Transport Overhead and Path Overhead drop and Insert Ports, and four 2.488Gb/s or 622Mb/s TFI-5 System Interfaces.
Mura will support up to 16xOC-3 and 16xOC-12, or any valid mix, of client interfaces. Building upon a complete solution offering for customers, both Drava and Mura will work seamlessly with AMCC's successful Volta, Evros, Rubicon framing and mapping devices.
analogZONE Says . . .
While several long-time SONET/SDH players (including Agere and Cypress) have backed off on, or even exited the market, AMCC's new Drava and Mura devices reaffirm their commitment to the multi-service applications that will keep TDM services at the heart of many networks for the foreseeable future. These successors to their Danube and Missouri devices (introduced back in 2000/2001) now include functionality that puts them back in the running with competitors like Fujitsu and PMC-Sierra.
 The Drava device can accept OC-3/12/48 tributaries for framing, pointer processing, STS-1 level grooming and switching in small ADM applications. For larger MSPP applications they can deliver framed, pointer-processed traffic to a larger external switch fabric via the integrated TFI-5 links (see  ">Fig. 1). For these larger applications, alarm conditions from tributaries can be aggregated and passed in-band (or out of band) to the switch card. In addition to their higher level of integration, Drava and Mura's line-side and system-side interfaces have been updated with on-chip SerDes PHY instead of the older SFI-like multiple serial interfaces or nibble-wide parallel interfaces found on earlier devices. Drava's power consumption is 4.5 W maximum, 2 - 3 W typical (depending on which I/O channels are being used).
If you're interested only in lower-speed applications (such as line card aggregation), the lower-priced, pin-compatible Mura eliminates the OC-48 port but retains all of Drava's OC-3/12 interfaces, as well as both TFI-5 ports (see ">Fig. 2).
Several companies, including Agere and PMC-Sierra, have similar competing parts but AMCC makes some good arguments that their unique port flexibility, density and transparency/remapping features give them an edge. The most unique feature AMCC brings to the market is its full-transparency capabilities that allow their framer/pointer-processors to pass both standard and proprietary signaling schemes across network boundaries. Depending on your application you can select from three different operating modes: the first mode simply passes all overhead as-is between frames as they are aggregated and de-aggregated. You can also map an original set of selected overhead bytes between incoming stream and outgoing traffic. A full-custom mode allows the customer to select overhead bytes and place them anywhere within whatever frame they desire.
It's also interesting to note that both devices are built around a 20G crossbar mux that's fed by a pair of 2.5 Gbit/s pointer processors. The processors offer full path level monitoring and their bandwidth can be allocated as needed between client and line ports -- a feature that could be very useful in UPSR/SMCP protection schemes. I'm not completely familiar with all the comparable products but, from a quick look at what I know is out there, it seems that his level of flexibility in bandwidth allocation seems to be unique in the industry.
The crossbar is also connected to a pair of so-called lite 5 Gbit/s pointer processors. While they do not handle path level overhead monitoring and only perform the TFI-5 portion of performance monitoring, their built-in de-skew capabilities can accommodate significant timing variations between channels and should help give designers some leeway in designing the high-speed interconnects used in backplane-based products.
AMCC also points out that their Drava offers a better mix of ports than the PMC framer/pointer-processors (such as PMC's ARROW 2448 which offers 2 OC-48 and 8 OC-3/12 ports vs. AMCC's 16 OC-3/OC-12 or 4 OC-48 ports) more fully user-configurable transparency than Agere's formidable TSOT1610G framer. On the other hand, AMCC's Drava lacks Agere's ability to support OC-192 connections and does hot have the low-order VT1.5 pointer processing capabilities that PMC's ARROW 2488 does. In their defense, AMCC argues that their devices are targeted towards many applications where low-order VT processing is not needed, or not handled on the tributary card and subtended off a larger switch fabric elsewhere.
Drava (S4809) and Mura (S4819) are sampling in PBGA-783 with production scheduled for Q2 2007 priced at $216 and $171, respectively in 5000-piece lots.
Product Sheet Drava
Product Sheet Mura
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