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programmablelogicZONE Products for the week of March 3, 2008
Actel Corporation Says...
Low-Power IGLOO and ProASIC3 FPGAS for 99 cents
15,000-gate devices are attractive for power- and price-sensitive applications
Directly addressing design requirements for programmable solutions that meet ever-tightening power and cost budgets, Actel Corporation today announced the addition of two new members to its award-winning IGLOO and successful ProASIC3 field-programmable gate array (FPGA) families starting at just 99 cents. Comparable in density to 128 macrocell complex programmable logic device (CPLD) offerings, the new 15,000-gate devices offer power consumption as low as 5 microwatts (5µW), 10 times less static power than more expensive CPLDs. The new IGLOO AGL015 and ProASIC3 A3P015 FPGAs provide a lower cost, lower power alternative to low-density FPGAs and CPLDs in consumer, medical, communications and industrial applications, such as portable media players, smart phones, memory card interfaces, system controllers, portable medical devices and wireless sensors.
“There continues to be tremendous demand for low-power programmable solutions at lower densities to handle the control and bridging functions in portable designs,” said Fares Mubarak, senior vice president at Actel. “At this new price point, no other low-density FPGA or CPLD can achieve power consumption as low as that offered by the new IGLOO and ProASIC3 devices, making these low-density solutions the ideal choice for power- and price-sensitive applications.”
Low-Power, Low-Cost Options for Feature-Rich Portable Design
Attractive for portable applications with 5µW static power, Actel’s IGLOO FPGAs consume more than 200x less static power than competitive FPGA offerings and deliver more than 10x the battery life of the current leading PLDs in portable applications. Consuming as little as 5µW of static power and 50 percent less dynamic power than Actel’s 30,000-gate AGL030 device, the IGLOO AGL015 device supports both 1.2- and 1.5-volt operation and offers up to 250 MHz system performance, 49 available I/Os and 1 kilobit (Kb) of nonvolatile Flash ROM. The 1.5-volt ProASIC3 A3P015 device offers up to 350 MHz system performance, 49 I/Os, and 1 Kb of nonvolatile Flash ROM.
To allow for further system cost, power and area reductions, the new IGLOO and ProASIC3 FPGAs offer the ability to bridge between two different I/O voltages levels and 1 Kb of on-chip memory, potentially eliminating the need for discrete devices. Used in the ProASIC3 and IGLOO architectures, a unique Versatile core cell is automatically used as combinatorial or sequential logic by the Actel Libero Integrated Design Environment (IDE), enabling more efficient routing, flexibility and device utilization when compared with fixed-architecture CPLD solutions.
EN-Genius Says…
In some ways, Actel’s release of sub-$1 versions of their IGLOO and ProASIC 3 families is no big deal since it’s really just an extension of a existing product lines. Viewed another way, crossing the one-buck threshold is very significant because the $0.25 - $0.50 it saves over competing parts may help it win a place in many high-volume consumer applications where programmable logic has not been viable until now. Since many of these applications will involve battery-powered handheld devices, the IGLOO family low power consumption is also a big plus.
 The chart (supplied by Actel) offers a useful comparison of price and power between ACTEL’s IGLOO and its leading competition, although I expect that the price differentials should shrink considerably shortly after this information circulates through the market. One also must take the pricing listed here with a grain of salt since it tends to be somewhat elastic, depending on the customer and quantity involved.
Less elastic is the static power consumption, which the IGLOO family excels at with12 µW static power and an ultra-low 5 µW in its unique Flash-freeze sleep mode. Just to keep the record straight, the low static power comes at a price in the form of a slower operating speed. IGLOO delivers a maximum clock rate of 250 MHz vs 323 MHz for a comparable Xilinx device. Actel ProASIC3 series supports clock speeds of up to 350 MHz, if you can tolerate their somewhat higher static power. Time constraints prevented me from obtaining precise speed data on Altera’s MAX IIZ series but since the standard MAX II line runs at 300 MHz, it’s likely that the –Z variant runs at about half that speed.
At 15 k gates (128 macrocells), there is no room for an embedded processor core and the smaller die size down not support the embedded RAM, PLLs, or other fancy niceties that some of the larger family members. But, in many of the applications that you’d be using these devices for they’d be unnecessary anyway. One of the places these parts should come in really handy is providing custom I/O for the low-cost microcontrollers that are often found knocking about in cell phones, media players, and other handhelds. The 49 I/O lines available on these no-frills parts should be enough to handle tasks like keypad encoding or multiplexing/decoding address and data buses and still have enough connections left over to serve as glue logic between other system silicon elements.
The IGLOO AGL015 and ProASIC3 A3P015 FPGAs will sample in March 2008 with volume production in Q2 2008. The devices are offered in 8x8 mm single-row QFN packages. The devices are supported by the Actel Libero IDE v8.2 SP1. Device pricing starts at $0.99 for the A3P015 and AGL015 devices in volume.
Actel IGLOO Product Overview
Actel IGLOO Data Sheet
Actel ProASIC Product Overview
Actel ProASIC Data Sheet
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