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programmablelogicZONE Products for the week of June 9, 2008
TPACK Says…
Integrated Packet Switch and OTN Mapper
TPACK’s FPGA-Based TPOX3203 20 Gbit/s Packet Optical Engine provides Carrier Ethernet switching and mapping over OTN
TPACK has announced the availability of the SMARTPACK TPOX3203 20 Gbit/s Packet Optical Engine. Part of the recently announced SMARTPACK P-OTN family, the TPOX3203 provides a highly integrated chip solution for Carrier Ethernet over OTN. Thus, the TPOX3203 can provide cost, power, and board space savings for telecom equipment manufacturers.
Designed specifically for Packet-Optical Transport Network (P-OTN) applications, the TPOX3203 solution integrates Connection Oriented Ethernet (PBB-TE, T-MPLS and PWE3/VPLS) switching and traffic management with a full 10 Gbit/s OTU-2 OTN packet mapper in a single device. Also, standard Ethernet and VLAN switching including Q-in-Q is supported.
The solution scales to 40 Gbits/s packet switching and 2x OTU-2 interfaces making it ideal for P-OTN packet Add-Drop Multiplexing in Reconfigurable OADM (ROADM) networks. Based on an Altera Stratix III FPGA, the solution is also fully customizable and quickly adapted to meet new standards and other requirements.
TPACK’s SMARTPACK P-OTN family is a set of customizable chip solutions based on integration of Connection Oriented Ethernet, SONET/SDH and OTN functional blocks in different configurations. Designed to fit into various system architectures, SMARTPACK P-OTN solutions provide flexibility at both the system and chip level allowing fast development of highly differentiated P-OTN platforms.
EN-Genius Says…
TPACK’s announcement of its SMARTPACK P-OTN family is a sure sign that the feeding frenzy around Optical Transport Networks (OTN) has begun as they join several leading chip makers who are trotting out silicon to support what they think will be an explosive market. As product cycles get shorter and ASIC development costs continue to rise, TPAK’s FPGA-based product strategy is making more and more sense for designers involved with OTN and other networking equipment.
This family of products differs a bit from their TPWX3192 10Gbit/s carrier-grade packet mapper engine I reviewed back in October 2007; it was intended as a ready-to-use product that could be tweaked a bit to add a custom interface or a few additional features if the customer needed it. Although the TPOX3203 and its other family members will be available as a working reference design, it is really intended as a baseline design that gets modified to meet specific customer requirements – sort of like a quick-turn ASIC. TPACK expects that FPGA-based devices make things like universal line cards possible that can be factory- or field-configured to support whatever mix of connections and features you need.
 The TPOX3203 is the first member of the SMARTPAK-P line, intended for 10 Gbit/s ODU-2 applications. It adds mixed-packet/TDM support to G.709 Optical Transport Networks by adding an OTN framing and mapping block to the TPX3103 carrier Ethernet switch/traffic manager which was introduced late in 2007. Although it can serve as a so-called multiplexer/transponder in 10 Gbit/s ODU-2 applications, the TPOX3203 does not have the ability to mix SONET/SDH and Ethernet traffic that the Galazar MXP2 muxponder device (reviewed in networkZONE this week). This should not be a problem in many applications which only support Ethernet or Metro Ethernet. Its FPGA-based architecture also enjoys the distinct advantage of being fully customizable, something that can help a designer add features which will differentiate their product in what will soon be a highly-competitive market.
While the block diagram shows single 10GbE port and 12 GbE interfaces, the FPGA-based switch can be customized to handle as many as 16 GbE connections. It can support this mild oversubscription using external RDRAM as a packet buffer. The TPOX3203 GbE switch/traffic manager performs basic L2 switching for up to 72 k IP flows (with 8 service classes each) and up to 8 k VPNs as well as handling all the L2 protocols required to support legacy TDM networks. It supports PBB-TE (Nortel’s variant of Mac-in-MAC tunneling), T-MPLS (transport MPLS), PWE3, VPLS, encapsulation protocols and protocol translation. The traffic manager uses a pipeline of configurable state machines handles packets in a deterministic manner by pre-classifying them and generating a list of operations to be performed before executing them in one shot.
Packets are then passed to a GFP (frame mode) processor before moving them to the OPU/ODU/OUT block for framing, mapping and FEC, or enhanced-FEC, processing. If your application doesn’t require the extra 2 - 3 dB worth of coding gain that the enhanced FEC block provides, eliminating enhanced FEC could save lots of gates on your FPGA.
TPACK has also included a so-called Mate Interface which is a multi-lane serial bus clocked at 900 MHz that allows portions of the switch’s traffic to be diverted from its normal path to an adjacent chip or a backplane. This allows ganging of two devices for redundant solutions, performing add/drop functions, or passing selected streams between wavelengths.
On the network side, the TPOX3203 sports a 10 Gbit/s interface that can be configured as a SPI-4 port for connection to a fabric manager (Dune, Enigma, BRCM/Sandburst) or as an OUT-2 port which hooks up directly to a standard DWDM optical module.
Even fully-loaded the TPOX3203 fits on a Stratix III SE260 (260 k logic elements) FPGA, a tier or two down from their biggest offering. If a particular application does not require a particular interface or traffic processing function, designers can de-feature their design to fit in a smaller, lower-power device. While TPACK says it’s too early in their testing cycle to have firm power consumption numbers, preliminary results indicate that it should be around 18 W and they are very confident that it won’t exceed 20 W.
TPOX3203 Product Information
SMARTPACK P-OTN Product Information
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