programmablelogicZONE Products for the week of November 17, 2008
Real Intent Says…
Meridian FPGA: Popular Clock Domain Crossing Verification Software for Altera Customers
Product strengthens Real Intent’s FPGA support, makes FPGA design verification easier and more economic
Real Intent, Inc. has announced its first release of Meridian FPGA verification software . Meridian FPGA is specifically designed to work with Altera Corporation’s latest release of its Quartus II software, version 8.1, to verify Clock Domain Crossings (CDC). It offers a cost-effective alternative when compared to the cost of equivalent ASIC design software.
Meridian FPGA enables 4X faster CDC closure through automatic, template-free and powerful clock intent verification. It verifies FIFO and Protocol-driven CDC interfaces for maximal confidence. Effects specific to FPGA platforms are automatically integrated in the verification process. Meridian FPGA is tightly integrated with Quartus II software to deliver verification confidence in a seamless flow.
“Reliable CDC verification is a growing problem for FPGA designers,” said Prakash Narain, CEO of Real Intent. “We have always supported both ASIC and FPGA designs. By integrating Altera’s Quartus II software with Meridian FPGA, we are giving our mutual customers access to powerful CDC verification technology, making it easier and economic to produce reliable FPGA designs.”
“As the functionality of FPGAs increases, a greater level of importance is placed on verification tools that quickly demonstrate the accuracy of the user’s design,” said Jim Smith, director of EDA vendor relations at Altera. “Real Intent’s Meridian FPGA verification software complements the productivity benefits of our Quartus II software by helping speed the verification process and minimize overall FPGA development time.”
Users interested in learning more about the latest release of Altera’s Quartus II software, version 8.1, can visit http://www.altera.com/quartus2
About Meridian FPGA from Real Intent
Meridian FPGA performs automatic clock intent verification by automatically extracting and verifying clock, reset, data and control crossings in the design to ensure reliable CDC operations. Meridian FPGA is easy to use and supports Tcl and Synopsys Design Constraint (SDC) interfaces, as well as offers flexible debug and sign-off capabilities for easy CDC verification.
EN-Genius Says…
With FPGA-based designs becoming increasingly complex, Real Intent’s Meridian FPGA verification software fills a critical need for a straightforward means of achieving timing closure across multiple clock domains. Their larger (and much more expensive) packages of general-purpose ASIC and FPGA design & verification tools have been on the market for some time but this handy, and relatively affordable, sub-set has been developed specially for Altera as a low-cost solution to plug this hole in their otherwise-commendable Quartus tool set.
Whether or not you buy this product, it’s worthwhile checking out Real Intent’s White Paper, Clock Domain Crossing Demystified: The Second Generation Solution for CDC Verification, which can be downloaded from their web site. While you’re on Meridian’s web site, there’s a checkbox on the same page where you can request an evaluation copy of the Meridian package.
The release above gives you most of the important details but it’s probably worth repeating that Meridian FPGA is compatible with every Altera product family from their value-priced Cyclone series to their biggest, baddest Stratix chips. The software is sold on a per-seat basis, with a list price $15 k/seat/year including maintenance and support. Real Intent says that it offers significant discounts for multi-seat packages.
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