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programmablelogicZONE Products for the week of December 1, 2008
PLDA Says…
Superspeed USB 3.0 Host And Device IP
Allows Designers to Prototype In FPGA and Migrate Seamlessly to ASICs
PLDA has announced the immediate availability of a new line of SuperSpeed USB IP products designed for ASIC and FPGA. SuperSpeed USB or USB 3.0 increases the speed of USB to 5 GHz, reducing system latency and increasing performance. This announcement significantly expands PLDA’s presence in the interconnect IP market and extends its existing leadership in the PCI space to this new standard.
Additionally, PLDA has demonstrated their USB 3.0 products at the SuperSpeed USB Developer’s Conference, held Nov 17 – 18, 2008 in San Jose, CA. The demo highlighted the performance of the PLDA solution and showcases real-world data transfers between a SuperSpeed USB host and a device at 5 GHz.
The PLDA suite of USB 3.0 products provide a range of advanced features including:
- Compliance with the USB 3.0 Specification, revision 1.0 and backwards-compatibility to USB 2.0
- Extensive IP Configurability
- Wide selection of user interfaces
- Ability to prototype in FPGA and migrate seamlessly to ASIC
Key components of the PLDA USB 3.0 Suite of products include:
- USB 3.0 Host IP
- USB 3.0 Device IP
- USB 3.0 Development Kit, available with latest generation FPGA from Altera and Xilinx
- Reference designs
- Complete documentation for all components and comprehensive technical support provided by PLDA’s IP designers
“There are a number of design synergies between PCI Express and SuperSpeed USB” said Stephane Hauradou, PLDA’s CTO. “As a recognized leader and expert in high-speed serial link interface IP, we provide the most comprehensive and most flexible IP solution for SuperSpeed USB implementation. We work closely with major PHY IP vendors and foundries to extend our USB 3.0 offering to any available process node; we also team up with leading Verification IP providers to not rely solely on our own verification methodology and ensure a robust verification of our IP.”
During the SuperSpeed USB Developers Conference, PLDA demonstrated their USB 3.0 solutions. The demo featured two PLDA USB 3.0 ASIC development platforms connected to each other via a USB 3.0 compliant 5.0 GHz link. The host board incorporated PLDA’s USB 3.0 Host IP and traffic generator engine. Traffic is received by the device board using PLDA’s USB 3.0 Device IP and data throughput is displayed in real-time via the PLDA demo software’s graphical user interface.
EN-Genius Says…
When the work on the 5 Gbit/s USB 3.0 standard began a few years ago I was skeptical both about whether it would be practical to implement and whether there would be enough demand for that kind of bandwidth to justify its development. Fortunately, I was wrong and it looks like USB 3.0 will eventually enjoy the same popularity as today’s 400 Mbit/s USB 2.0 technology and that, within a few years, it will become a must-have interface for everything from video cameras to media servers. Part of the reason USB 3.0/SuperSpeed USB should do so well is that the standards-makers wisely (luckily?) set its transfer rate at the magic 5 Gbit/s level – a speed that matches the PCI Express 2.0 (PCIe Gen2) standard and, equally important, is within reach of today’s SerDes-equipped FPGAs.
Although PLDA is touting its SuperSpeed IP as a tool that allows designers to make an easy transition between FPGA prototypes and hard ASICs, I suspect that we’ll see more designs than they expect remaining in programmable logic. We could see even more use of FPGA-based production designs in medium-to-higher-end applications if Altera’s next version of its value-priced Arria FPGAs (reviewed here April 2007) is allowed to run at the 5 Gbit/s rates required to support PCIe Gen2 and USB 3.0. Since doubling the Arria’s maximum speed-to-speed would erode sales for their high-end Stratix II GX family, it will probably take a year or two to happen: most likely after the next upgrade to the Stratix that pushes its SerDes capability comfortably into the 10 - 12 Gbit/s range. It’s unclear precisely what strategy Xilinx will be pursuing to make 5G-capable FPGAs affordable enough to use in moderate-volume production but you can bet that they will be doing something to capture the sockets in the high-performance servers, storage systems and networking equipment that will be early adopters of these faster interconnect technologies.
Regardless of what percentage of early SuperSpeed USB-capable designs remain in FPGAs, PLDA’s full set of design and verification tools that work equally well for ASICs will help the new standard gain acceptance among designers.
The PLDA SuperSpeed USB Host IP, Device IP, Development Kit and Reference Designs are ready to ship and available now from PLDA.
Product Page Host IP
Product Page Device IP
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