programmablelogicZONE Products for the week of March 19, 2007
Xilinx Says…
Xilinx Rolls Out Non-Volatile Variants of its Value-Priced Spartan FPGA
Domain-optimized FPGA brings performance and functionality of SRAM-based devices into non-volatile FPGA market space with higher system integration, lower system cost and higher security
Xilinx, Inc. has announced the Spartan -3AN FPGA platform, an expansion of its multi-platform strategy, and the industry’s most advanced non-volatile field programmable gate array (FPGA) solution. Built on its proven 90nm Spartan-3 Generation low-cost FPGA fabric, the new platform combines the performance and functionality advantages of SRAM-based technology with reliable non-volatile flash technology in a single-chip solution. With the industry’s largest user flash memory and enhanced security capabilities, this new platform is optimized specifically for non-volatile applications where higher system integration or security is critical. With up to 1,000X more on-chip user flash as compared to its nearest competitor, the Spartan-3AN platform offers unprecedented system flexibility, significantly outperforming competing non-volatile FPGAs.
“Our newest addition to the Spartan-3 Generation serves space-sensitive applications requiring non-volatile single-chip solutions, including such key areas as multimedia encoding and decoding, data compression/decompression, and microcontroller applications,” said Christophe Chene, senior director of marketing for the General Products Division at Xilinx. “The combination of our programmable platform and embedded flash technology provide the most flexible, reliable and cost-effective solution for these types of dynamic applications.”
“Embedded non-volatile memory is becoming a key requirement in an increasing range of systems across the entire spectrum of applications,” said Jordan Selburn, principal analyst from iSuppli. “In addition to the programmable and system-level integration benefits, products such as the Spartan-3AN also address significant issues for chip designers in the areas of design security and authentication.”
The Spartan-3AN platform offers a range of device security features that safeguard against reverse engineering, cloning, and unauthorized overbuilding. It builds on Xilinx Device DNA technology to provide a low-cost and effective mechanism for authenticating a valid design and ensuring a flexible design level security. Designers have full flexibility in customizing algorithms for both authentication as well as responses to authentication failures. With its embedded flash, the Spartan-3AN platform further optimizes security by hiding any configuration communication from the outside, making it extremely difficult to understand the design contained within the FPGA.
The advanced flash technology of the Spartan-3AN platform takes the DeviceDNA feature to a new level, offering factory flash ID and flash user field. The factory flash ID is very similar to the Device DNA serial number, with a unique factory set ID that is different in every flash device, offering a 64 byte long word that can be read and added into the authentication algorithm. The flash user field is a one time programmable 64 byte word that can be used to store the authentication result. The user field can also be used to store revision tracking serial numbers or user data constants that will never be changed in the system.
Non-volatile FPGAs with No Compromises
The Spartan-3AN platform uses advanced serial flash technology to set a new standard for non-volatile FPGAs with 20-year data retention and 100,000 write/erase cycles, providing up to 1,000X write/erase cycles than competitive offerings. The on-chip flash reduces cost and footprint size with up to 11Mb of user flash for embedded and storage applications, as well as eliminating the need for external memory. In addition, fine-grained protection as well as lockdown and erase functions enable real-time control capabilities.
The Spartan-3AN platform is also the first 90nm non-volatile FPGA to offer dual-mode power management. In suspend mode, it achieves more than 40 percent power reduction and wake up time of less than 100 milliseconds, as well as system-level synchronization across time domains. In hibernate mode, it achieves up to 99 percent static power reduction.
Next-Generation Configuration Management
The Spartan-3AN platform provides a flexible, cost-effective approach to address the non-volatile needs of rapidly changing industries. Designers can build a single device while managing a variety of different feature sets with multiple configurations. The capacity of Spartan-3AN devices makes it possible for designers to store multiple configurations and dynamically select between configuration files.
Multiple configurations also can be used to support diagnostic nodes, feature upgrades, and complete product differentiation while using the same hardware design. Decisions such as protocols, buses, and the number of interfaces can all be dynamically changed to address new market requirements. The built-in multiboot feature, which allows virtually infinite re-configurations, lowers overall system cost and facilitates easier field upgrades.
About Spartan-3AN FPGAs
The Spartan-3AN platform is available in five non-volatile device options. Configurations range from 50K to 1.4M system gates with up to 576Kb block RAM, 16Mb total embedded flash, and up to 502 I/Os supporting 26 popular I/O protocol standards, In addition, unique FPGA capabilities such as digital clock managers (DCMs), multipliers, and low power modes make these devices ideal for bridging, memory interfacing, digital signal co-processing and embedded control applications. All devices are pin-compatible with Spartan-3A FPGAs.
EN-Genius Says…
Instead of building its boot memory on the same chip as its logic, Xilinx’s new Spartan-3AN embedded-Flash FPGA family achieves its non-volatile capabilities by co-packaging their tried-and-true Spartan-3 econo-chips standard with commodity flash memories. By offering a single-chip non-volatile products with a wide range of capacities, Xilinx hopes to capture what it calls the expanding-edge applications (STBs, flat panel TVs and mobile infrastructure) where they can help designers bridge the 6 - 18 month gap between the time a hot product needs to be in the market and the time that ASICs/ASSPs emerge to serve maturing markets. The extra memory capacity and security features offered by the 3AN series could also help it nibble away at the markets currently being served by some of the larger traditional non-volatile products offered by companies like Lattice and Actel.
In theory, co-packaging separate Flash chips allows Xilinx to piggyback its products on the huge investment in process and design technology from commodity Flash and using separate processes for the FPGA and Flash gives them around a 10% speed advantage over on-chip Flash elements. Xilinx makes a good case that the cost and speed advantages become even more significant in the larger-sized devices of the applications they hope to address.
Although the 3AN series behave just like a standard Spartan-3 chip and a separate Flash memory, they offer some obvious, and a few non-obvious advantages over a discrete solution. Besides the savings in board space and assembly costs, using co-packaged memory keeps your programming code inside the package at all times, and out of reach of the casual hacker. This should be sufficient for many applications but the standard security features of the Flash and the Spartan devices (described in the release above) work well together to let you to lock down your code to whatever level of hardness your budget and paranoia level dictate.
In case you’re not familiar with it, Xilinx’s DNA mentioned in the release is a one-time programmable 55-bit data field that’s pretty much standard on the regular Spartan series which is now supplemented by the Flash chip one-time writable 64-byte code space. This makes it easy to implement selective enabling/disabling of the code based on time, key code or other variable -- a real neat feature for if you’re designing products that support try-before-buy or subscription-based services. And since these are standard Flash memories, you also get all their nifty sector lock-down/sector protect and page/block/sector erase features which you can use or ignore as your design and deadlines require.
Xilinx has used the relatively low cost of Flash memory to include great gobs of extra capacity that can be used in other parts of your design for storing tables, microcode, or whatever else you want. The 500 kbit - 11 Mbit worth of free on-chip storage can be directed to nearly any pin on the chip for output as a standard SPI bus signal -- something that could save you some painful layout problems in your next design. You can also use some of the extra capacity to store extra switchable FPGA configuration files to support separate test/operate modes, code to for several different product variants, or a golden configuration that can be used as a fallback if an upgrade fails to properly take. While Actel and Lattice both do offer some extra on-chip storage, it’s limited to a few dozen, or hundred kbit that is usually reserved for storing ID codes, crypto keys, and the like.
While the 3AN series is really designed to address a new class of applications in a market space above the capacity and embedded functionality of both Actel’s venerable and versatile ProASIC3/E product line and the Lattice XP products they do present a challenge to the upper end of both series. For some applications, the smaller 3AN parts could be extremely competitive with Actel thanks to their much larger Flash capacity and their ability to tolerate many more read/write cycles than the Actel integrated flash process can. But this is only an advantage in the fraction of applications where you expect to update your code frequently. On the other hand, Actel’s devices which use Flash cells as part of the FPGA logic wake up pre-programmed and do not require the boot time (100 ms for an average-sized device) the Spartan chips need to load the contents of their serial Flash from a power-off, hibernation mode.
Spartan-3AN single-package Flash/FPGA scheme might also be able to address some of the market served by the upper end of the Lattice XP series of economy FPGAs which feature on-chip Flash. But, despite their somewhat slower operating speed (a function of the 130-nm process and having the FPGA and Flash share the same fab process) Lattice still offers some advantages, including a much faster boot time provided by the parallel interface between the Flash and FPGA elements. Lattice also claims that the parallel boot Flash is more secure than a serial Flash because it is harder for would-be reverse engineers to physically access all the signals.
Of course much of Spartan-3AN success will depend on how well Xilinx executes on its plan. It’s hard to tell whether their optimistic claims that the co-packaging approach can yield a product that costs the same or even less than a two-package solution but they certainly tell a convincing story about the efforts they have gone through to make it happen. Assuming that they are able to deliver, the Spartan-3AN looks like a good candidate for accelerating a product development cycle in many cost-sensitive applications.
Customers can immediately begin designing systems with Spartan-3AN FPGAs using the ISE 9.1i design tool suite and Spartan-3 Generation library of application-specific IP. The XC3S200AN, XC3S700AN and XC3S1400AN are sampling with production slated for Q3 2007. Pricing will be $4.90 in 250-k piece lots.
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