Altera Corporation has extended their leadership in the transceiver-based FPGA market with the introduction of the low-cost ArriaGX family. Arria GX FPGAs are optimized to support PCI Express (PCIe), Gigabit Ethernet (GbE) and Serial RapidIO(SRIO) standards up to 2.5 Gbps; these standards are rapidly emerging as mainstream protocols in a wide variety of markets and applications. Features of the Arria GX family include the proven StratixII GX transceiver technology, flip-chip packages for superior signal integrity, software tools and verified intellectual property (IP) cores. To immediately start designing with Arria GX devices, customers can utilize QuartusII design software version 7.1. Volume production begins in June of this year.

 

The Arria GX family is comprised of five devices ranging in density from 21,580 to 90,220 logic elements (LEs), up to 4.5 Mbits of embedded memory and up to 176 multipliers, and is built on TSMC’s established 90-nm process. The family addresses the rapidly growing need for low-cost FPGAs with transceivers in the communications, computer, storage and industrial markets.

 

“What differentiates Arria GX devices from other offerings in the market is not one particular element but a combination of powerful attributes,” said Jordan Plofsky, Altera’s senior vice president of marketing. “Primarily, customers are getting a very reliable product -- proven transceiver technology built on a proven process. Next, the price is unparalleled for such a comprehensive product. Finally, we designed it to maintain the best levels of signal integrity -- each member of this family is available in flip-chip packages. These are the key elements our customers told us were most important for the applications we are targeting.”

 

Arria GX FPGAs provide up to 12 full-duplex transceiver channels optimized to implement the PCIe, GbE and SRIO protocols. These transceivers are based on the same technology that has demonstrated its success in the high-end Stratix II GX family. The devices utilize flip-chip packaging technology, which provides a significant signal integrity advantage over wire-bond packages when combining transceivers with advanced memory interfaces.

 

“PCI Express is driving the growth of FPGAs with integrated transceivers, and our intellectual property offerings help ease the development of these designs,” said Jean-Yves Brena, CEO at PLDA. “Altera also realizes the opportunity PCI Express offers and has hit the mark in terms of the Arria GX FPGA’s features, price point and product alignment with the requirements of this market.”

 

“The Arria GX family, with its embedded transceivers, enables customers to combine our IP subsystem solutions into a low-cost, single-chip protocol solution such as our new NIC Controller, which bridges PCI Express with Ethernet MAC or SPI-4.2,” said Francois Balay, president of MoreThanIP.

Comprehensive Software and IP Support

Arria GX FPGAs offer a unique design environment that includes software tools, complete characterization reports, reference designs, and verified IP cores that meet compliance and interoperability. Also available is a protocol-specific development kit with support for PCIe x1 and x4, SRIO and GbE. Designers can begin their Arria GX designs today by downloading and installing the easy-to-use Quartus II development software version 7.1. The Quartus II software also integrates seamlessly with leading third-party synthesis and simulation tools. Customers can download the Subscription Edition and Web Edition of the Quartus II software at http://www.altera.com/download.

 

 

 

I’ve been telling Altera (and anyone else who would listen) that equipping low-cost FPGAs with SerDes will open up huge opportunities in many markets which revolve around GbE, PCI Express, Serial RapidO, and other 1.25 - 2.5 Gbit/s serial interconnect technologies. So when Altera contacted me to request a briefing on this chip, I got very excited because it looked like they had finally decided to go toe-to-toe with Lattice’s ECP2M line of SerDes-equipped low-cost FPGAs (Reviewed here November 2006) that won our coveted Product of the Year award in 2006. It turns out that the real story behind these new devices is a bit more complicated than that, although they still hold the promise of getting Altera into some business that they couldn’t touch before.

 

The part that makes this story especially interesting is that, rather than equipping its low-cost Cyclone III series with high-speed SerDes capabilities, they’re offering a lower-cost version of their SerDes-equipped high-end Stratix II GX family. According to Altera, these are actually Stratix II devices with the same transceivers and programmable logic arrays as their premium-priced brethren but housed in less expensive packaging. Altera says that they are differentiating the Arria devices by testing them to wider tolerances so that they have a lower guaranteed bandwidth. I have a difficult time believing you’ll simply getting re-packaged Stratix parts for several reasons I’ll discuss briefly later on, but I’m sure that whatever they are selling will contain lots of technology lifted from their high-performance 6+ Gbit/s transceiver that helped them win another one of our Product of the Year awards a couple of years ago.

 

When I asked Altera about why they chose to sell de-rated versions of their flagship Stratix products instead of upgraded versions of their economy-oriented Cyclone series, they said that Cyclone’s lower-cost wire bond packages have enough extra inductance and crosstalk to make them unsuitable for 2.5 Gbit/s operation, not to mention requiring slightly higher operating power. This, and the robust CDR/equalizer technology Arria inherits from the Stratix line, will allow it to perform effortlessly at 2.5 Gbit/s rates, speeds that are at the edge of Lattice’s wire-bonded ECP2M SerDes speed range. According to Altera, the Stratix flip-chip package ability to put a pad wherever its needed also gives designers gives better single-ended signal integrity (ground bounce, Vcc sag, etc) for non-SerDes interfaces such as DDR and any other HSTL/SSTL connections.

 

To keep Arria products from invading the very profitable higher-speed and custom interface applications that the Stratix IIGX series caters to, Altera will supply the new devices with a special version of their top-line Quartus modeling and SerDes test tools (originally developed for Stratix series) that only allow the user to implement GbE, PCIe and SRIO interfaces. Altera would not say it in so many words, but I got the distinct impression that the code is heavily locked down to prevent any creative types from trying to use the transceivers for any other application and that there is some sort of silicon dependency that makes the full-featured standard Quartus tools useless for work on the Arria platform.

 

While Arria’s transceivers are not able to support the 6+ Gbit/s speeds the Stratix-branded chips are capable of, the 1.25 - 2.5 Gbit/s rates they are qualified to support position them in the sweet spot of the market to catch PCe, GbE, SRIO applications such as high-performance computers, comms and networking products, and many types of products that are candidates for hardware DSP accelerator blocks. Their lower pricing structure should allow them to play in the potentially huge mainstream market for PCIe-equipped low-cost FPGAs to serve as bridges, custom I/O and specialized hardware accelerators in everything from high-performance servers to security appliances.

 

I’d also expect Arria to find a warm welcome in applications like wireless basestations where they can offload PCIe- and SRIO-enabled DSPs with low-cost FPGA-based hardware acceleration that can save some serious dollars and shave many watts off a power budget. Altera is probably correct that they will find similar uses in more specialized applications like video processing or medical and industrial imaging.

 

It’s tough to tell whether the folks who briefed me really believe that Arria is nearly identical to Stratix, or if they were coyly avoiding a few uncomfortable issues they’d rather not discuss. In either case, I don’t think Altera would be silly enough to let these chips out in the open market unless they are at least lightly-modified to keep cost-conscious engineers from trying to use them in applications which require Stratix II additional speed and flexibility. Given the long lead times involved with clean-sheet chip development (especially tricky stuff like SerDes transceivers) my guess is that the Altera first generation of Arria parts will be variants of the Stratix II GX family that have been selectively disabled, probably using a (relatively) quick and inexpensive update to one or more metal mask layers.

 

Assuming my guess is correct, this could buy them time to get a second generation of Arria devices that are less complex and less expensive to manufacture than a comparably-sized de-rated Stratix chip but still deliver performance where it counts. Unconfirmed but reliable reports from other industry sources indicate that Arria’s fabric will run about 35% slower than the Stratix II and the chips be a bit lighter on embedded resources like RAM, DSP blocks, and user I/O.

 

Given the high-class packaging they’ve committed to, this second generation could still cost a little more than an equivalent-sized Lattice part, but the transceiver’s superior signal integrity should give it much better margins, especially at 2.5 Gbit/s, that would make any small cost differential a wise investment. It may also turn out that any additional chip cost is offset by a lower total solution cost because Altera’s low-inductance signal path-optimized packages need fewer passive components and PCB layers to cleanly move their signals between chip and circuit board than Lattice’s wire bonded parts.

 

Production-qualified Arria GX will begin shipping in larger packages in June 2007 with smaller packaging expected in September 2007. Prices start at $50 for the EP1AGX50CF484C6 25-k piece lots. Altera says that their $1/LE pricing scales downward for their smaller parts, albeit not quite linearly, so that their 20-k LE may be able to come close to Lattice current $22.95 pricing for its entry-level device. All Arria GX devices (with LE counts of 20 k - 90 k) will be shipping by September 2007. The Arria GX Development Kit is currently available.