Fast, Flexible FPGA/FPGA Processor Memory Configuration
by Jim Weyand, Principal Systems Engineer, Embedded Systems Design, Inc.
In many applications, FPGAs and the external volatile memory used for embedded FPGA processors are configured at power-up from serial EPROMs. Although easy to implement, this configuration scheme is extremely slow, provides very limited capacity for multiple FPGA images and processor software applications, and is difficult for a user to maintain. For true reconfigurable processing applications this simply is not an adequate solution.
What’s needed is an architecture that addresses these issues. This new architecture should:
- Use the parallel configuration modes available in today’s FPGAs to dramatically shorten download times
- Leverage commercially-available high-density Flash memories to provide storage for multiple FPGA configurations and processor software applications
- Allow users to modify FPGA configurations and processor software applications stored in Flash memory and activate downloading of these files from Flash
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