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test&measurementZONE Products for the week of February 25, 2008
Agilent Technologies Says…
First-to-Market Functional Test Solution for MIPI D-PHY Standard Interconnects
Agilent Technologies Inc. announced the industry's first MIPI D-PHY (Mobile Industry Processor Interface) protocol test solution, supporting Camera Serial Interface (CSI-2) and Display Serial Interfaces (DSI) for mobile devices. This solution, which is based on Agilent's 16900 logic analyzer platform, facilitates MIPI D-PHY hardware and software debug and reduces interoperability testing.
The emergence of standard high-speed serial, protocol-based interconnects between components in mobile devices is driving changes in the debug and test methodologies, where compliance and interoperability test become increasingly important. Simultaneously, as power requirements must be kept to a minimum, it is difficult to test the nature and operation of these interconnects with traditional tools; specific test solutions are required.
As a contributing member of the MIPI Alliance, Agilent is committed to the development of test solutions that address these emerging needs and help accelerate the adoption of MIPI D-PHY-enabled devices. The MIPI Alliance promotes standardized interconnects for mobile devices.
Both the real-time analysis hardware and the stimulus hardware support MIPI D-PHY CSI-2 and MIPI D_PHY DSI. They accelerate development by providing bit-level to image-level test capabilities, hierarchical protocol display, real-time error detection and automated tools for test-vector generation that allow users to efficiently simulate, troubleshoot and verify designs.
This logic analyzer-based solution completes Agilent's previously introduced DigRF v3 test solution to offer a unique functional debug platform for next-generation mobile devices.
"For our Mobile eXtreme Convergence platforms, which simultaneously support both CSI and DSI, the Agilent MIPI D-PHY analysis solution saved us significant development time during the integration and validation phases of our design cycle," said Lane Schaller, product manager for Freescale.
"The introduction of this solution illustrates Agilent's commitment to use its expertise in logic, serial protocol and wireless test to help our customers transform mobile device architectures to digital technologies with a new set of tools that are well integrated into the wireless use model," said Sigi Gross, vice president and general manager of Agilent's Digital Test Division.
EN-Genius Says…
Keep in mind that to use Agilent's N4851A analysis probe and its N4861A stimulus probe, you will need at least one Agilent 16800 Series or 16900 Series logic analyzer, with 68-channels or more. You may argue that logic analyzers are intended for wide parallel-bus applications, but Agilent’s designers use their innate analysis and display capabilities as a platform for serial protocol testing such as MIPI. Why not? These boxes (Agilent calls them mainframes) are powerful and smart, PCI-based and expandable, network oriented, and include high-res color displays.
The MIPI Focus
For those of you not familiar with it, the Mobile Industry Processor Interface, defined by the MIPI Alliance, is an open specification defining both hardware and software interfaces between processors and peripherals typically found in battery-powered portable products. By the way, the MIPI Alliance complements existing standards from bodies such as the Open Mobile Alliance and 3GPP (the 3rd Generation Partnership Project), but MIPI's focus is on the microprocessors, peripherals, and their interfaces. The MIPI serial bus is a low-power low pin-count implementation that transmits packetized data.
A System-Level View
Agilent 16800 or 16900 logic analyzers, when equipped with MIPI analysis and stimulus capabilities, can also be time-correlated with other system measurements. That means you can search for causality, checking for events that impact operation from system logic, or on other serial and/or parallel buses, or in memory. That’s not only cool, but it also leverages your investment in the logic analyzer itself.
Let’s look at how this works. To reproduce knotty system problems, or run non-regression tests, and check for interoperability, you will likely need to create traffic conditions that may be difficult to reproduce with actual devices. That's where this system shines, with smooth software debugging of these packet-based MIPI D-PHY systems.
When using both the analysis probe and the stimulus probe, you should be able to perform realtime tracing of MIPI D-PHY bus modes, and decode and visualize the CSI-2 (Camera Serial Interface) and DSI (Display Serial Interfaces) protocols relatively easily.
One thing to get you moving is a straightforward trigger set-up using a pre-defined pattern library. A multi-level trigger sequencer can also trigger on complex events, and you can trigger on short and long protocol-specific patterns and error conditions, too.
Cross-triggering can let you observe the activity on a system bus when an event happens on another bus in a multi-bus multi-processor architecture, too. The traces captured from multiple buses are displayed with time-correlated time-stamps and common markers.
Multiple Analyzers
What's more, multiple Agilent analyzers can share events, so you can perform much more complex cross-triggering if need be. That's probably something reserved for the most multifaceted multi-processor portable systems, but the ability to do it is there should you need it. In today's world of low cost embedded controllers it's not unusual for designers to sprinkle dedicated processors throughout a design.
 In use, debug info is portrayed on a hierarchical packet-level basis on the logic analyzer itself. The traces display bus mode, CSI-2 and DSI traffic, and trigger status, so you can look at the overall display and compare frames, which looks like a good way to ferret out bit-level differences. Embedded markers and automatic error detection abet all of this visual information.
Using these probes, you can also generate customized traffic sequences using bit-level editing, and you can capture and re-play transactions. You can also perform link-layer tests with parametric control of both voltage and timing. This combination of custom traffic generation and realtime analysis should go a long way to help diagnose and characterize a complex interrelated MIPI system in short order, with realtime insight about a device's behavior at various protocol levels and with varying signals.
In its MIPI D-PHY analysis configuration, in an analysis-only mode, the N4851A transparently captures traffic between two devices. Flying lead pods and so-called soft-touch connectors make connection to the DUT so you can peer at link activity and protocol operation.
In active test mode, where the Agilent system delivers the stimulus and does analysis, a stimulus is sent to the DUT (device under test), and you then get to simultaneously see the analysis based on the DUT’s response (the stimulus from the N4861A stimulus probe can happen at speeds up to 500 Mbit/s). That capability can be used to test peripherals by simulating a system controller, for example. Stimulus patterns can be defined from .CSV files, or using a graphical interface. You can also use previously recorded patterns.
Agilent probes should help during MIPI D-PHY prototype turn-on and debugging, as well as during system integration of an embedded controller with D-PHY displays and cameras. As the company’s press statement notes, pricing for the N4851A starts at about $13,500, with the N4861A priced starting at about $14,500.
A 68-channel 16900 Series logic analyzer will set you back anywhere from about $14,000 to $65,000, depending on configuration and memory depth. However, Agilent contends that you can use the same platform from bus design all the way through to system-level test, thereby reducing the overall cost of the equipment in the long run.
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