test&measurementZONE Products for the week of September 24, 2007
Tektronix Says…
Serial Analyzers Add Comprehensive PCI Express 2.0 Test Solution
Provides Best Logic Analyzer Solution for PCIe 2.0; Power Management and Cross Bus Analysis; Probes Enable Easy Access
Tektronix, Inc., a leading worldwide provider of test, measurement and monitoring instrumentation, announced new TLA7S16 and TLA7S08 Serial Analyzers for test and validation of PCI Express (PCIe) 1.0 and 2.0 designs. Unlike competing protocol analyzers, the new Tektronix Serial Analyzer products uniquely provide detailed PCIe 2.0 protocol information along with cross-bus analysis. They augment the industry's most complete PCIe test solution, enabling the development of next-generation, high-speed computing platforms.
PCI Express 2.0 introduces performance enhancements for the computer, storage, and communications industries. The primary enhancement is the speed increase from 2.5 Gb/s to 5.0 Gb/s. The most significant validation challenges for PCIe 2.0 are capturing the signal at twice the speed, verifying power management, and performing cross-bus analysis. For power management, the number of lanes in use or "link width" (up to 16 lanes), speed of the link (from 2.5 Gb/s to 5.0 Gb/s), and idle states are dynamically negotiated to conserve power whenever possible. Power management is critical in systems whether it is implemented in a laptop to extend battery life or in a server system to conserve energy.
PCI Express 2.0
PCIe 2.0 is a three layered architecture with physical (electrical and logical sub-blocks), data link and transaction layers. The link width, initialization, and speed negotiation is performed within the logical sub-block of the physical layer. The data link layer is responsible for ensuring that data sent on the link is correct and is responsible to ensure that packets are reliably transmitted on the link. Finally, the transaction layer is responsible for constructing request/completion transactions, transaction layer packet flow control, and messaging.
"PCIe 2.0 brings a new set of validation challenges for design engineers," said Jit Lim, Director, Technology Solutions Group, Tektronix. "The ability to validate physical layer events is critical, coupled with the need to have complete system visibility to locate elusive problems that may have been propagated from other buses in the system. This requires test equipment that is capable of acquiring the PCIe signal through all of the dynamically changing states. The new Tektronix TLA7S08 and TLA7S16 Serial Analyzers are the best logic test solution for debug and validation of PCIe 1.0 and 2.0 designs."
In addition to the serial analyzers, new P6716/P6708 mid-bus probes and pre-release slot interposer probes are available to test and validate all layers of the PCIe 2.0 protocol. The new analyzers plug into Tektronix TLA7000 series logic analyzers adding the ability to debug and correlate general purpose signals and other system interconnects including memory and computer processors.
"The industry is beginning its delivery of PCI Express 2.0 rollout with the expected introduction of products and platforms later this year," said Jim Pappas, Director Technology Initiatives & Industry Marketing, Intel Corp. "Capable and comprehensive test tools to ensure proper operation and interoperability are an important factor to the continued success of PCI-Express 2.0, and Tektronix has played a key role in enabling PCI-Express 2.0 product delivery with its extensive suite of test solutions."
Power Management
PCI Express 2.0 link width and speed negotiation requires debugging the logical sub-block of the physical layer where logic analysis instruments are able to provide detailed data, unlike protocol analysis tools. The new Tektronix TLA7S08 and TLA7S16 Serial Analyzers can acquire x1, x4 links or x8 links respectively. Two TLA7S16 Serial Analyzers are used for bi-directional x16 links.
PCIe 2.0 links can change width (number of lanes) dynamically. For instance, an eight lane link (x8) could change to 4 lanes (x4) -- which requires less power -- and return back to x8 when this is needed by the system. The PCIe 2.0 specification also allows for the link to dynamically alternate the speed between 2.5 Gb/s to 5 Gb/s, supporting both PCIe 1.0 and 2.0 standards. Additionally, a link can go into idle power states during the short periods of time when it is not being utilized. It is critical to validate that these link operations are performed correctly during the width and speed changes and during transitions to and from power management states. The new Tektronix Serial Analyzers can uniquely validate and debug operation of these link processes.
Cross-Bus Analysis
As electronic systems become more complex, integration of parallel and high-speed serial buses in designs is increasingly common. In many cases, it is not possible to debug system level issues by looking only at the PCIe bus. An example would be a case where the PCIe link issues a memory read request to the processor. In turn, the processor issues a memory read request to DDR memory. If the DDR memory reads from the incorrect memory address, the incorrect data will be returned back to the PCIe link and will result in incorrect system behavior. The Tektronix TLA7000 logic analyzer is the only tool that is able to time correlate interactions between PCIe, processors, and memory using a single test platform.
PCI-Express 2.0 Probing
The TLA7S08 and TLA7S16 Serial Analyzers are complemented by a series of serial acquisition probes. Designers who have the flexibility to incorporate a mid-bus probe will benefit from the superior electrical performance of the P6708 half-width and P6716 full-width mid-bus probes. Narrower link widths can take advantage of the P6708 footprint that minimizes board real estate.
In many situations, probe accessibility is not considered at design time. Engineers are often faced with debugging their silicon on platforms that were designed by OEMs or ODMs and in many cases these platforms do not have probe access points. A slot interposer is an alternative probing method for devices that utilize the PCIe slot, such as graphics cards or host channel adapter cards. Pre-release slot interposers are available in x1, x4, x8, and x16 link widths.
Comprehensive Test Solution
The Tektronix TLA7000 Series Logic Analyzer, TLA7S16 and TLA7S08 Serial Analyzers, P6716/P6708 mid-bus probes and the pre-release slot interposer probes are used to test and validate all layers of the PCIe protocol: physical, data link, and transaction layers.
Below the logical sub-block of the physical layer is the electrical sub-block. Tektronix provides the most capable PCIe 2.0 test solution for the electrical sub-block comprised of industry leading DSA70000 real-time and DSA8200 sampling oscilloscopes, AWG7000 arbitrary waveform generators, and complete test software. This new generation of Tektronix measurement tools helps engineers with the test challenges presented by PCIe 2.0. These next-generation instruments and application software solutions are part of an entirely new and comprehensive test bench for high-speed serial data.
EN-Genius Says…
It's amazing how quickly high-speed multi-lane serial data standards are evolving and proliferating. Just as designers have gotten their arms comfortably around PCIe (PCI Express) v1.0 running at 2.5-Gbit/s, Generation 2 (PCIe 2.0) is here, impacting the next round of designs at 5-Gbit/s.
If you're designing Gen 2 silicon, these modules can be used during chip validation. If you're a systems designer, they'll equally lend themselves to system debug and validation.
 If you want to hit your market window sweet spot, you'll likely have to invest in test gear that's Gen 2-compliant right now. That's where the Tektronix Serial Analyzer modules come in. They look like they'll fill the bill by being able to dish up PCIe 2.0 protocol information, and giving you cross-bus analysis capabilities to boot.
Time-Stamped Correlation
The ability to correlate with other system buses and general-purpose debug signals is also bound to be a boon, thanks to common system time-stamping. In complex systems, it's tough to know where and when bugs rear their heads, or how they're dependent on system functions. Tek's time-stamping should make it possible to zero in on the kinds of problems that may arise from other system bus problems as well as those on the PCIe links proper. You can time-stamp up to 54-bit of data at 25-ps resolution.
What's also nifty about these new modules is that they can capture and trigger on PHY (physical) layer events, whether problems exist during link training or while a link is going into or out of its power management states. Supporting x1, x2, x4, x8, and x16 PCIe links, these deep memory modules can also track 2.5-Gbit/s to 5-Gbit/s data rate changes, and dynamically track changes in link width.
Minimally intruding or loading down on sensitive microwave-domain circuits, these new modules use state machine triggering to accommodate every layer of the protocol. So, in addition to the PHY layer, you can test PCIe's Data Link and Transaction layers, too. For all layers, protocol decoding and error reporting is provided in both list and waveform views, with realtime link status indicators.
Windows Logic Analyzers
Not mentioned in Tektronix press statement (above) is that these signal acquisition modules must be used with Tek existing TLA7012 Series portables or TLA7016 Series benchtop mainframes. These are essentially PC-based logic analyzers that can house from two to six TLA modules, depending on model.
 Both the TLA7012 and the TLA7016 run Windows XP Pro. As such, the boxes are equipped with keyboards and mice for human I/O, and multiple USB 2.0 (Universal Serial Bus) ports for peripheral expansion. These so-called mainframes can also support DVI-to-analog video adapters and external oscilloscope interfaces. They come with requisite LAN and USB cabling, as well as certificates of calibration, and operating software.
The TLA7012 and TLA7016 can also support multiple displays, if extended desktop viewing is what you want. Being Windows machines at heart, they can also be equipped with DVD-RW drives, internal hard disks, and removable hard drives.
Gobs of trigger I/O abet tight interfacing to other pieces of test gear, too. That goes along with Tek iView (integrated view) capability. iView supports up to 15-GHz, 40-Gsample/s and 64-Mbit analog acquisition with standalone Tektronix TDS digital storage scopes.
Both the TLA7012 portable and the TLA7016 benchtop mainframes also accept both TLA logic analyzer and pattern generator modules. Moreover, the TLA7012 and TLA7016 can be configured as either master or expansion mainframes. That ability lets them readily expand to handle projects with large numbers of buses, or other high channel-count applications.
The new serial analyzers are in production with pricing starting at $55,000. Mid-bus probe prices start at $16,000.
Data Sheet
|
